{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,22]],"date-time":"2025-10-22T10:48:31Z","timestamp":1761130111952,"version":"3.37.3"},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,9,11]],"date-time":"2023-09-11T00:00:00Z","timestamp":1694390400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,9,11]],"date-time":"2023-09-11T00:00:00Z","timestamp":1694390400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100004040","name":"KU Leuven","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100004040","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,9,11]]},"DOI":"10.1109\/esscirc59616.2023.10268774","type":"proceedings-article","created":{"date-parts":[[2023,10,6]],"date-time":"2023-10-06T17:46:43Z","timestamp":1696614403000},"page":"409-412","source":"Crossref","is-referenced-by-count":2,"title":["A 16nm 128kB high-density fully digital In Memory Compute macro with reverse SRAM pre-charge achieving 0.36TOPs\/mm<sup>2<\/sup>, 256kB\/mm<sup>2<\/sup> and 23. 8TOPs\/W"],"prefix":"10.1109","author":[{"given":"Weijie","family":"Jiang","sequence":"first","affiliation":[{"name":"MICAS, ESAT, KU Leuven,Leuven,Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pouya","family":"Houshmand","sequence":"additional","affiliation":[{"name":"MICAS, ESAT, KU Leuven,Leuven,Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marian","family":"Verhelst","sequence":"additional","affiliation":[{"name":"MICAS, ESAT, KU Leuven,Leuven,Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wim","family":"Dehaene","sequence":"additional","affiliation":[{"name":"MICAS, ESAT, KU Leuven,Leuven,Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365788"},{"article-title":"16.4 An 89TOPS\/W and 16.3TOPS\/mm2 AllDigital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications","year":"2021","author":"Chih","key":"ref2"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731681"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42614.2022.9731754"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731639"},{"journal-title":"[Online]. Available:","article-title":"Neural Network Accelerator Comparison","author":"Guo","key":"ref6"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2008.4681846"}],"event":{"name":"ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)","start":{"date-parts":[[2023,9,11]]},"location":"Lisbon, Portugal","end":{"date-parts":[[2023,9,14]]}},"container-title":["ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10268677\/10268683\/10268774.pdf?arnumber=10268774","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T09:39:49Z","timestamp":1725442789000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10268774\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,9,11]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/esscirc59616.2023.10268774","relation":{},"subject":[],"published":{"date-parts":[[2023,9,11]]}}}