{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,30]],"date-time":"2025-09-30T04:25:36Z","timestamp":1759206336723},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,9]]},"DOI":"10.1109\/essderc.2013.6818862","type":"proceedings-article","created":{"date-parts":[[2014,5,30]],"date-time":"2014-05-30T14:34:21Z","timestamp":1401460461000},"page":"234-237","source":"Crossref","is-referenced-by-count":6,"title":["Impact of statistical variability and charge trapping on 14 nm SOI FinFET SRAM cell stability"],"prefix":"10.1109","author":[{"given":"Xingsheng","family":"Wang","sequence":"first","affiliation":[]},{"given":"Binjie","family":"Cheng","sequence":"additional","affiliation":[]},{"given":"Andrew R.","family":"Brown","sequence":"additional","affiliation":[]},{"given":"Campbell","family":"Millar","sequence":"additional","affiliation":[]},{"given":"Jente B.","family":"Kuang","sequence":"additional","affiliation":[]},{"given":"Sani","family":"Nassif","sequence":"additional","affiliation":[]},{"given":"Asen","family":"Asenov","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.53"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2011.6131494"},{"journal-title":"Garand Mystic","year":"0","key":"10"},{"key":"1","first-page":"456","article-title":"A 4.0 GHz 291Mb Voltage-Scalable SRAM Design in 32nm High-e? Metal-Gate CMOS with Integrated Power Management","author":"wang","year":"0","journal-title":"Proc IEEE Int Solid-State Circuits Conference 2009"},{"key":"7","first-page":"296","article-title":"RTS Amplitude Distribution in 20nm SOI FinFETs Subject to Statistical Variability","author":"wang","year":"0","journal-title":"Proc SISPAD 2012"},{"key":"6","first-page":"152","article-title":"From mean values to distributions of BTI lifetime of deeply scaled FETs through atomistic understanding of the degradation","author":"toledano-luque","year":"0","journal-title":"Proc VLSI Technology Symposium 2011"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2010.2044014"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ESSDERC.2012.6343346"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/2765491.2765512"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2010.2099661"},{"key":"11","first-page":"230","article-title":"A 4.6GHz 162Mb SRAM Design in 22nm Tri-Gate CMOS Technology with Integrated Active VMIN-Enhancing Assist Circuitry","author":"karl","year":"0","journal-title":"2012 IEEE International Solid-State Circuits Conference"}],"event":{"name":"ESSDERC 2013 - 43rd European Solid State Device Research Conference","start":{"date-parts":[[2013,9,16]]},"location":"Bucharest, Romania","end":{"date-parts":[[2013,9,20]]}},"container-title":["2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6811819\/6818804\/06818862.pdf?arnumber=6818862","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T14:03:00Z","timestamp":1490277780000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6818862\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,9]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/essderc.2013.6818862","relation":{},"subject":[],"published":{"date-parts":[[2013,9]]}}}