{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,29]],"date-time":"2025-06-29T23:21:28Z","timestamp":1751239288039},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,9]]},"DOI":"10.1109\/essderc.2017.8066650","type":"proceedings-article","created":{"date-parts":[[2017,10,25]],"date-time":"2017-10-25T16:13:21Z","timestamp":1508948001000},"page":"296-299","source":"Crossref","is-referenced-by-count":2,"title":["Understanding of slow traps generation in plasma oxidation GeO<inf>x<\/inf>\/Ge MOS interfaces with ALD high-k layers"],"prefix":"10.1109","author":[{"given":"Mengnan","family":"Ke","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mitsuru","family":"Takenaka","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shinichi","family":"Takagi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1063\/1.4958890"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1149\/1.3599065"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1149\/1.3569938"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/j.mee.2015.04.079"},{"key":"ref14","first-page":"322","article-title":"Impact of La2O3\/InGaAs MOS Interface on InGaAs MOSFET Performance and its Application to InGaAs Negative Capacitance FET","author":"chang","year":"2016","journal-title":"IEDM Tech Dig"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1143\/JJAP.44.7928"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1063\/1.3234395"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2013.2238942"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1063\/1.3564902"},{"key":"ref8","first-page":"397","article-title":"Understanding the suppressed charge trapping in relaxed- and strained-Ge\/SiO2-HfO2 pMOSFETs and implications for the screening of alternative high-mobility substrate\/dielectric CMOS gate stacks","author":"franco","year":"2013","journal-title":"IEDM Tech Dig"},{"key":"ref7","first-page":"642","article-title":"1-nm-thick EOT High Mobility Ge n- and p-MOSFETs with Ultrathin GeOx\/Ge MOS Interfaces Fabricated by Plasma Post Oxidation","author":"zhang","year":"2011","journal-title":"IEDM Tech Dig"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1063\/1.2959731"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2008.918272"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2014.7047168"}],"event":{"name":"ESSDERC 2017 - 47th IEEE European Solid-State Device Research Conference (ESSDERC)","start":{"date-parts":[[2017,9,11]]},"location":"Leuven, Belgium","end":{"date-parts":[[2017,9,14]]}},"container-title":["2017 47th European Solid-State Device Research Conference (ESSDERC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8059714\/8066575\/08066650.pdf?arnumber=8066650","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,11,30]],"date-time":"2017-11-30T15:22:34Z","timestamp":1512055354000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8066650\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,9]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/essderc.2017.8066650","relation":{},"subject":[],"published":{"date-parts":[[2017,9]]}}}