{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T08:49:35Z","timestamp":1725612575212},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,5]]},"DOI":"10.1109\/ets.2012.6233023","type":"proceedings-article","created":{"date-parts":[[2012,7,19]],"date-time":"2012-07-19T23:41:10Z","timestamp":1342741270000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["Adaptive testing of chips with varying distributions of unknown response bits"],"prefix":"10.1109","author":[{"given":"Chandra K. H.","family":"Suresh","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ozgur","family":"Sinanoglu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sule","family":"Ozev","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"17","DOI":"10.1109\/TEST.2006.297743"},{"doi-asserted-by":"publisher","key":"18","DOI":"10.1109\/VTS.2010.5469626"},{"doi-asserted-by":"publisher","key":"15","DOI":"10.1109\/TSM.2004.827001"},{"key":"16","first-page":"122","article-title":"An embedded process monitor test chip architecture","year":"2010","journal-title":"IEEE International Conference on Microelectronic test structures"},{"doi-asserted-by":"publisher","key":"13","DOI":"10.1109\/ICCAD.2006.320136"},{"doi-asserted-by":"publisher","key":"14","DOI":"10.1109\/TSM.2004.826937"},{"doi-asserted-by":"publisher","key":"11","DOI":"10.1109\/ATS.2009.90"},{"key":"12","article-title":"Beyond at speed","author":"amodeo","year":"2005","journal-title":"Test and Measurement World"},{"doi-asserted-by":"publisher","key":"3","DOI":"10.1109\/TEST.2010.5699271"},{"doi-asserted-by":"publisher","key":"2","DOI":"10.1145\/1629911.1630098"},{"doi-asserted-by":"publisher","key":"1","DOI":"10.1109\/TEST.2001.966714"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1109\/19.963168"},{"key":"7","first-page":"69","article-title":"Statistical post processing at wafersort","author":"rehani","year":"2002","journal-title":"IEEE VLSI Test Symposium"},{"key":"6","doi-asserted-by":"crossref","first-page":"92","DOI":"10.1109\/TEST.2001.966622","article-title":"Neighbor selection for variance reduction in IDDQ and other parametric data","author":"daasch","year":"2001","journal-title":"IEEE International Test Conference"},{"key":"5","first-page":"189","article-title":"Variance reduction using wafer patterns in IDDQ data","author":"daasch","year":"2000","journal-title":"IEEE International Test Conference"},{"doi-asserted-by":"publisher","key":"4","DOI":"10.1109\/ICCD.2010.5647687"},{"key":"9","first-page":"203","article-title":"In search of the optimum test set","author":"daasch","year":"2004","journal-title":"IEEE International Test Conference"},{"key":"8","first-page":"673","article-title":"Screening minVDD outliers using feedforward voltage testing","author":"madge","year":"2002","journal-title":"IEEE VLSI Test Symposium"}],"event":{"name":"2012 17th IEEE European Test Symposium (ETS)","start":{"date-parts":[[2012,5,28]]},"location":"Annecy, France","end":{"date-parts":[[2012,5,31]]}},"container-title":["2012 17TH IEEE EUROPEAN TEST SYMPOSIUM (ETS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6222773\/6232988\/06233023.pdf?arnumber=6233023","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T21:37:47Z","timestamp":1497994667000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6233023\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,5]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/ets.2012.6233023","relation":{},"subject":[],"published":{"date-parts":[[2012,5]]}}}