{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T15:53:35Z","timestamp":1780674815438,"version":"3.54.1"},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/ets.2015.7138737","type":"proceedings-article","created":{"date-parts":[[2015,7,6]],"date-time":"2015-07-06T21:22:30Z","timestamp":1436217750000},"page":"1-6","source":"Crossref","is-referenced-by-count":7,"title":["Branch guided functional test generation at the RTL"],"prefix":"10.1109","author":[{"given":"Vineeth V.","family":"Acharya","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sharad","family":"Bagri","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Michael S.","family":"Hsiao","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/EDTC.1997.582325"},{"key":"ref11","year":"0","journal-title":"Microsoft research z3 smt solver"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1999.805857"},{"key":"ref13","year":"0","journal-title":"Openrisc circuits"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1996.556941"},{"key":"ref3","year":"0","journal-title":"Verilator"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2012.6401556"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"385","DOI":"10.1145\/343647.343802","article-title":"Automatic Test Bench Generation for Validation of RT-level Descriptions: An Industrial Experience","author":"corno","year":"2000","journal-title":"Proc Design Automation and Test in Europe Conference"},{"key":"ref8","author":"holland","year":"1972","journal-title":"Adaptation in Natural and Artificial Systems"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2013.51"},{"key":"ref2","first-page":"1","article-title":"Efficient validation input generation in RTL by hybridized source code analysis","author":"liu","year":"2011","journal-title":"Proceedings of Design Automation and Test in Europe Conference and Exhibition (DATE)"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2009.5340179"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"698","DOI":"10.1145\/196244.196619","article-title":"sequential circuit test generation in a genetic algorithm framework","author":"rudnick","year":"1994","journal-title":"31st Design Automation Conference"}],"event":{"name":"2015 20th IEEE European Test Symposium (ETS)","location":"Cluj-Napoca, Romania","start":{"date-parts":[[2015,5,25]]},"end":{"date-parts":[[2015,5,29]]}},"container-title":["2015 20th IEEE European Test Symposium (ETS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7127855\/7138715\/07138737.pdf?arnumber=7138737","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,28]],"date-time":"2019-08-28T01:26:53Z","timestamp":1566955613000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7138737\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/ets.2015.7138737","relation":{},"subject":[],"published":{"date-parts":[[2015,5]]}}}