{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,10]],"date-time":"2026-04-10T16:08:57Z","timestamp":1775837337228,"version":"3.50.1"},"reference-count":22,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,5,1]],"date-time":"2020-05-01T00:00:00Z","timestamp":1588291200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,5,1]],"date-time":"2020-05-01T00:00:00Z","timestamp":1588291200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,5,1]],"date-time":"2020-05-01T00:00:00Z","timestamp":1588291200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,5]]},"DOI":"10.1109\/ets48528.2020.9131603","type":"proceedings-article","created":{"date-parts":[[2020,7,2]],"date-time":"2020-07-02T21:06:26Z","timestamp":1593723986000},"page":"1-6","source":"Crossref","is-referenced-by-count":11,"title":["LiD-CAT: A Lightweight Detector for Cache ATtacks"],"prefix":"10.1109","author":[{"given":"Cezar","family":"Reinbrecht","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Said","family":"Hamdioui","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mottaqiallah","family":"Taouil","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Behrad","family":"Niazmand","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tara","family":"Ghasempouri","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jaan","family":"Raik","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Johanna","family":"Sepulveda","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","author":"zhang","year":"2016","journal-title":"CloudRadar A Real-Time Side-Channel Attack Detection System in Clouds"},{"key":"ref11","article-title":"Flush+reload: A high resolution, low noise, 13 cache side-channel attack","author":"yarom","year":"2014","journal-title":"23rd USENIX"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-40667-1_14"},{"key":"ref13","article-title":"Trace-driven cache attacks on aes","author":"acii\u00e7mez","year":"2006","journal-title":"ICICS"},{"key":"ref14","article-title":"Cache-timing attacks on aes","author":"bernstein","year":"2005","journal-title":"Tech Rep"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-17955-6_18"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/s00145-009-9049-y"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-11925-5_17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2858402"},{"key":"ref19","article-title":"Chair of VLSI Design, Diagnostics and Architecture","year":"2016","journal-title":"PoC - Pile of Cores Technische Universit&#x00C3;d&#x2019;t Dresden"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/s41635-019-00075-9"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3214292.3214294"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS50862.2020.9095707"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3123939.3124546"},{"key":"ref8","article-title":"Cacheshield: Protecting legacy processes against cache attacks","author":"briongos","year":"2017","journal-title":"CoRR"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/j.asoc.2016.09.014"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/11605805_1"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2017.57"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3214292.3214293"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2019.00108"},{"key":"ref22","article-title":"Nios ii classic processor reference guide","author":"altera","year":"2015"},{"key":"ref21","article-title":"Memory behavior of the spec2000 benchmark suite","author":"sair","year":"2000","journal-title":"Technical Report Tech Rep"}],"event":{"name":"2020 IEEE European Test Symposium (ETS)","location":"Tallinn, Estonia","start":{"date-parts":[[2020,5,25]]},"end":{"date-parts":[[2020,5,29]]}},"container-title":["2020 IEEE European Test Symposium (ETS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9125440\/9131553\/09131603.pdf?arnumber=9131603","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,27]],"date-time":"2022-06-27T15:53:45Z","timestamp":1656345225000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9131603\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,5]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/ets48528.2020.9131603","relation":{},"subject":[],"published":{"date-parts":[[2020,5]]}}}