{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T12:06:30Z","timestamp":1759147590953,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,9]]},"DOI":"10.1109\/ewdts.2011.6116419","type":"proceedings-article","created":{"date-parts":[[2012,1,6]],"date-time":"2012-01-06T19:28:21Z","timestamp":1325878101000},"page":"98-101","source":"Crossref","is-referenced-by-count":5,"title":["RoCoCo: Row and Column Compression for high-performance multiplication on FPGAs"],"prefix":"10.1109","author":[{"given":"Fatih","family":"Ugurdag","sequence":"first","affiliation":[]},{"given":"Okan","family":"Keskin","sequence":"additional","affiliation":[]},{"given":"Cihan","family":"Tunc","sequence":"additional","affiliation":[]},{"given":"Fatih","family":"Temizkan","sequence":"additional","affiliation":[]},{"given":"Gurbey","family":"Fici","sequence":"additional","affiliation":[]},{"given":"Soner","family":"Dedeoglu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","first-page":"349","article-title":"Some schemes for parallel multipliers","volume":"34","author":"dadda","year":"1965","journal-title":"Alta Frequenza"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/PGEC.1964.263830"},{"key":"10","first-page":"359","article-title":"Reconfigurable multiplier for virtex FPGA family","author":"poldre","year":"1999","journal-title":"Proc FPL"},{"journal-title":"PCST Plowing Based Carry Save Tree Generation","year":"2010","author":"keskin","key":"1"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/12.660163"},{"key":"6","first-page":"552","article-title":"A comparison of dadda and wallace multiplier delays","author":"townsend","year":"2003","journal-title":"Proc SPIE Advanced Signal Processing Algorithms Architectures and Implementations"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/92.386228"},{"key":"4","first-page":"574","article-title":"On parallel digital multipliers","volume":"45","author":"dadda","year":"1976","journal-title":"Alta Frequenza"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484851"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2008.4483927"}],"event":{"name":"Test Symposium (EWDTS)","start":{"date-parts":[[2011,9,9]]},"location":"Sevastopol, Ukraine","end":{"date-parts":[[2011,9,12]]}},"container-title":["2011 9th East-West Design & Test Symposium (EWDTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6107929\/6116407\/06116419.pdf?arnumber=6116419","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T17:09:06Z","timestamp":1490116146000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6116419\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,9]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/ewdts.2011.6116419","relation":{},"subject":[],"published":{"date-parts":[[2011,9]]}}}