{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T23:25:44Z","timestamp":1725405944559},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,9]]},"DOI":"10.1109\/ewdts.2013.6673169","type":"proceedings-article","created":{"date-parts":[[2013,12,4]],"date-time":"2013-12-04T14:45:40Z","timestamp":1386168340000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["Transaction level model of embedded processor for vector-logical analysis"],"prefix":"10.1109","author":[{"given":"Irina V.","family":"Hahanova","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Volodymyr","family":"Obrizan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alexander","family":"Adamov","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dmitry","family":"Shcherbin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","first-page":"404","author":"thomas","year":"2002","journal-title":"The Verilog Hardware Description Language"},{"key":"2","first-page":"354","author":"bergeron","year":"2001","journal-title":"Writing Testbenches Functional Verification of HDL Models"},{"doi-asserted-by":"publisher","key":"1","DOI":"10.1007\/0-387-30864-4"},{"key":"6","first-page":"150","article-title":"Logic networks application for computing process organization","author":"bondarenko","year":"2003","journal-title":"Radioelectronics &Informatics"},{"year":"1991","journal-title":"General Algebra Handbook","first-page":"368","key":"5"},{"key":"4","first-page":"528","author":"hahanov","year":"2010","journal-title":"Verilog&SystemVerilog"}],"event":{"name":"2013 11th East-West Design and Test Symposium (EWDTS)","start":{"date-parts":[[2013,9,27]]},"location":"Rostov-on-Don, Russia","end":{"date-parts":[[2013,9,30]]}},"container-title":["East-West Design &amp; Test Symposium (EWDTS 2013)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6663756\/6673074\/06673169.pdf?arnumber=6673169","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T18:27:07Z","timestamp":1490207227000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6673169\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,9]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/ewdts.2013.6673169","relation":{},"subject":[],"published":{"date-parts":[[2013,9]]}}}