{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T17:01:38Z","timestamp":1730221298772,"version":"3.28.0"},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,9]]},"DOI":"10.1109\/ewdts.2015.7493105","type":"proceedings-article","created":{"date-parts":[[2016,6,17]],"date-time":"2016-06-17T00:15:55Z","timestamp":1466122555000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["Fully delay and multiple stuck-at faults testable FSM design"],"prefix":"10.1109","author":[{"given":"A.","family":"Matrosova","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"V.","family":"Andreeva","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"V.","family":"Tomkov","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-2345-1"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.3103\/S8756699008050117"},{"key":"ref6","first-page":"42","article-title":"Full test design for circuits derived by two level synthesis method","author":"matrosova","year":"1978","journal-title":"Avtomatika and Vichislitelnaja technika No5"},{"key":"ref5","first-page":"556","article-title":"Detection of Multiple faults in Combinational Logic Networks","volume":"vc 20","author":"kohavi","year":"1975","journal-title":"IEEE Trans Comput"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/EWDTS.2010.5742130"},{"key":"ref7","first-page":"34","article-title":"Postroenie minimizirovannogo proveryaushego testa, obnaruzhivayushego neispravnost bezizbitochnoy DNF","author":"andreeva","year":"2006","journal-title":"Vestnik TGU"},{"key":"ref2","first-page":"237","article-title":"Easy testable combinational circuit design","author":"mattrosova","year":"2004","journal-title":"Proc of the 6-th International workshop on Boolean problems"},{"key":"ref1","article-title":"PDF testability of the circuits derived by special covering ROBDDs with gates","author":"matrosova","year":"2012","journal-title":"IEEE East-West Design & Test Symposium"}],"event":{"name":"2015 IEEE East-West Design & Test Symposium (EWDTS)","start":{"date-parts":[[2015,9,26]]},"location":"Batumi, Georgia","end":{"date-parts":[[2015,9,29]]}},"container-title":["2015 IEEE East-West Design &amp; Test Symposium (EWDTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7488713\/7493093\/07493105.pdf?arnumber=7493105","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T16:04:24Z","timestamp":1489766664000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7493105\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,9]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/ewdts.2015.7493105","relation":{},"subject":[],"published":{"date-parts":[[2015,9]]}}}