{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T17:01:42Z","timestamp":1730221302525,"version":"3.28.0"},"reference-count":27,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,9]]},"DOI":"10.1109\/ewdts.2015.7493123","type":"proceedings-article","created":{"date-parts":[[2016,6,16]],"date-time":"2016-06-16T20:15:55Z","timestamp":1466108155000},"page":"1-6","source":"Crossref","is-referenced-by-count":1,"title":["New sum code for effective detection of double errors in data bits"],"prefix":"10.1109","author":[{"given":"Valery","family":"Sapozhnikov","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dmitry","family":"Efanov","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vladimir","family":"Sapozhnikov","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vyacheslav","family":"Dmitriev","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","first-page":"111","article-title":"Design of Self-Testing Checkers for Unidirectional Error Detecting Codes","author":"piestrak","year":"1995"},{"key":"ref11","first-page":"216","article-title":"Self-Checking and Fault-Tolerant Digital Design","author":"lala","year":"2001"},{"key":"ref12","first-page":"320","article-title":"Technic-al Diagnosis Fundamentals (Diagnostic Algorithm Optimization, Apparatus Means)","author":"parkhomenko","year":"1981"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/S0019-9958(61)80037-5"},{"key":"ref14","first-page":"17","article-title":"Formation of the Berger Modified Code with Minimum Number of Undetectable Errors of Data Bits","volume":"34","author":"blyudov","year":"2012","journal-title":"Electronic Modeling"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/EWDTS.2013.6673133"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1134\/S0005117910060123"},{"key":"ref17","first-page":"290","article-title":"Limit Properties of Sum Code","author":"sapozhnikov","year":"2010","journal-title":"Proc of Petersburg Transport University"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1134\/S0005117914080098"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1999.766691"},{"key":"ref4","first-page":"856","article-title":"System-on-Chip Test Architectures: Nanometer Design for Testability","author":"wang","year":"2008"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1134\/S0005117908080134"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1002\/0471792748"},{"key":"ref6","first-page":"614","article-title":"Objects and Methods of On-Line Testing for Safe Instrumentation and Control Systems","author":"drozd","year":"2012","journal-title":"(in Russ ) Kharkov National Aerospace University “KhAI”"},{"key":"ref5","first-page":"578","article-title":"Design and Test Technology for Dependable Systems-on-Chip (Premier Reference Source","author":"ubar","year":"2011","journal-title":"Information Science Reference Hershey"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511803253"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/EWDTS.2014.7027067"},{"key":"ref2","first-page":"208","article-title":"Self-Checking Devices and Fault-Tolerant Systems","author":"sogomonyan","year":"1989"},{"key":"ref9","first-page":"224","article-title":"Self-Checking Digital Devices","author":"sapozhnikov","year":"1992"},{"key":"ref1","first-page":"549","article-title":"Logic Design Principles: With Emphasis on Testable Semicustom Circuits","author":"mccluskey","year":"1986"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2004.77"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/OLT.2000.856633"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2001.915039"},{"key":"ref24","first-page":"693","article-title":"New Code for Fault Detection in Logic Circuits","author":"saposhnikov","year":"1999","journal-title":"Proc 4th Int Conf on Unconventional Electromechanical and Electrical Systems"},{"key":"ref23","first-page":"59","article-title":"Weight-Based Sum Codes for Logic Devices Testing Organization","volume":"36","author":"sapozhnikov","year":"2014","journal-title":"Electronic Modeling"},{"key":"ref26","first-page":"77","article-title":"Properties of Sum Codes with Transitions between Data Bits with Direct Sequence of Weight Factors","author":"sapozhnikov","year":"2014","journal-title":"Computer Science and Control Systems"},{"key":"ref25","first-page":"21","article-title":"Concurrent Error Detection Based on New Code with Modulo Weighted Transitions between Information Bits","author":"mehov","year":"2007","journal-title":"Proc of 7th IEEE East-West Design & Test Workshop (EWDTW' 2007)"}],"event":{"name":"2015 IEEE East-West Design & Test Symposium (EWDTS)","start":{"date-parts":[[2015,9,26]]},"location":"Batumi, Georgia","end":{"date-parts":[[2015,9,29]]}},"container-title":["2015 IEEE East-West Design & Test Symposium (EWDTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7488713\/7493093\/07493123.pdf?arnumber=7493123","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T12:04:58Z","timestamp":1489752298000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7493123\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,9]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/ewdts.2015.7493123","relation":{},"subject":[],"published":{"date-parts":[[2015,9]]}}}