{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T20:36:09Z","timestamp":1729629369366,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,9]]},"DOI":"10.1109\/ewdts.2017.8110036","type":"proceedings-article","created":{"date-parts":[[2017,11,16]],"date-time":"2017-11-16T16:50:47Z","timestamp":1510851047000},"page":"1-7","source":"Crossref","is-referenced-by-count":0,"title":["Fault-based test methodology for analog amplifier circuits"],"prefix":"10.1109","author":[{"given":"Josip","family":"Mikulic","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peter","family":"Sarson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gregor","family":"Schatzberger","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Adrijan","family":"Baric","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/PACRIM.1991.160786"},{"key":"ref11","first-page":"84","article-title":"Comprehensive defect analysis and defect coverage of CMOS circuits","author":"a1-khalili","year":"1998","journal-title":"Defect and Fault Tolerance in VLSI Systems Proceedings IEEE International Symposium"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1999.777264"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2014.6847817"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743358"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2000.894222"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2016.7479189"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.125"},{"key":"ref4","first-page":"257","article-title":"Schematic-based fault dictionary: a case study","author":"abdei-halim","year":"2007","journal-title":"International Design and Test Workshop (IDT)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2016.7519321"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2012.2210852"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2014.7035281"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/BEC.2010.5631512"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2015.67"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/DCIS.2014.7035567"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/IMS3TW.2009.5158688"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"1465","DOI":"10.1109\/TCAD.2007.891373","article-title":"Statistical test development for analog circuits under high process variations","volume":"26","author":"liu","year":"2007","journal-title":"Computer-Aided Design of Integrated Circuits and Systems IEEE Transactions"}],"event":{"name":"2017 IEEE East-West Design & Test Symposium (EWDTS)","start":{"date-parts":[[2017,9,29]]},"location":"Novi Sad","end":{"date-parts":[[2017,10,2]]}},"container-title":["2017 IEEE East-West Design & Test Symposium (EWDTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8101050\/8110026\/08110036.pdf?arnumber=8110036","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,10,6]],"date-time":"2019-10-06T03:48:27Z","timestamp":1570333707000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8110036\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,9]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/ewdts.2017.8110036","relation":{},"subject":[],"published":{"date-parts":[[2017,9]]}}}