{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T05:18:29Z","timestamp":1725599909965},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,9]]},"DOI":"10.1109\/ewdts.2017.8110092","type":"proceedings-article","created":{"date-parts":[[2017,11,16]],"date-time":"2017-11-16T21:50:47Z","timestamp":1510869047000},"page":"1-6","source":"Crossref","is-referenced-by-count":1,"title":["Application of exhaustive search, branch and bound, parallel computing and Monte-Carlo methods for the synthesis of quasi-optimal network-on-chip topologies"],"prefix":"10.1109","author":[{"given":"Aleksandr","family":"Romanov","sequence":"first","affiliation":[]},{"given":"Irina","family":"Romanova","sequence":"additional","affiliation":[]},{"given":"Alexander","family":"Ivannikov","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/ELNANO.2014.6873434"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.18372\/2310-5461.20.5682"},{"key":"ref12","first-page":"46","article-title":"Bazovye grafy dlja postroenija topologii upravljajushhih setej mnogoprocessornyh system","author":"pinchuk","year":"2004","journal-title":"Iskusstvennyi Intellect"},{"key":"ref13","first-page":"253","article-title":"Metod vetvej i granic: Obzor teorii, algoritmov, programm i prilozhenij","author":"korbut","year":"1977","journal-title":"Serie auf mathematische operationsch und Statistik"},{"key":"ref14","first-page":"149","article-title":"Optimizacija topologij setej na kristalle","author":"romanov","year":"2011","journal-title":"Vestnik NTU &#x201C;HPI&#x201D; Tematicheskij vypusk Informatika i modelirovanie Har'kov NTU &#x201C;HPI"},{"year":"2004","author":"antonov","journal-title":"Parallel'noe programmirovanie c ispol'zovaniem tehnologii MPI Uchebnoe posobie","key":"ref15"},{"key":"ref16","first-page":"99","article-title":"Adaptacija parallel'nogo algoritma SPUIP dlja klastera NTUU &#x201C;KPI","author":"ladogubec","year":"2008","journal-title":"Vestnik NTUU &#x201C;KPI&#x201D; Informatika upravlenije i vichislitelnaja tehnika Kiev Vek+"},{"year":"0","journal-title":"Center for Supercomputing","key":"ref17"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1002\/9781118631980"},{"year":"2003","author":"dongarra","journal-title":"Sourcebook of Parallel Computing","key":"ref19"},{"key":"ref4","first-page":"13","article-title":"The Comparative Analysis of the Efficiency of Regular and Pseudo-optimal Topologies of Networks-on-Chip Based on Netmaker","author":"romanov","year":"2012","journal-title":"Advances and Challenges in Embedded Computing Montenegro Bar"},{"year":"2008","author":"zhonghai","journal-title":"Using micro-benchmarks to evaluate & compare Networks-on-chip MPSoC designs","key":"ref3"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/TVLSI.2007.900746"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1201\/CRCSYCHDETEC"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"49","DOI":"10.1145\/1117278.1117290","article-title":"The Routability of Multiprocessor Network Topologies in FPGAs","author":"saldana","year":"2006","journal-title":"Proceedings of the 2006 international workshop on System-level interconnect prediction"},{"year":"2004","author":"dally","journal-title":"Principles and Practices of Interconnection Networks","key":"ref7"},{"year":"2003","author":"axel","journal-title":"Networks on Chip","key":"ref2"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1007\/s11265-008-0256-9"},{"key":"ref9","first-page":"92","article-title":"Struktumye i kommunikativnye svojstva cirkuljantnyh setej","author":"monahova","year":"2011","journal-title":"Prikladnaja diskretnaja matematika"}],"event":{"name":"2017 IEEE East-West Design & Test Symposium (EWDTS)","start":{"date-parts":[[2017,9,29]]},"location":"Novi Sad","end":{"date-parts":[[2017,10,2]]}},"container-title":["2017 IEEE East-West Design &amp; Test Symposium (EWDTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8101050\/8110026\/08110092.pdf?arnumber=8110092","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,8,7]],"date-time":"2022-08-07T14:17:50Z","timestamp":1659881870000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8110092\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,9]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/ewdts.2017.8110092","relation":{},"subject":[],"published":{"date-parts":[[2017,9]]}}}