{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T15:15:00Z","timestamp":1725462900762},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,9]]},"DOI":"10.1109\/ewdts.2018.8524793","type":"proceedings-article","created":{"date-parts":[[2018,11,8]],"date-time":"2018-11-08T23:21:03Z","timestamp":1541719263000},"page":"1-6","source":"Crossref","is-referenced-by-count":1,"title":["A Methodology to Validate the On-Chip Buses of a Microcontroller"],"prefix":"10.1109","author":[{"given":"Meghashyam","family":"Ashwathnarayan","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jayakrishna","family":"Guddeti","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","article-title":"Post-silicon validation challenges: How EDA and academia can help","author":"jagannath","year":"2010","journal-title":"Proceedings of the 47th Design Automation Conference"},{"journal-title":"2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID)","article-title":"Tutorial T2E: Pre-Silicon Verification and Post-Silicon Validation: Dramatic Improvements through Disruptive Innovations","year":"0","key":"ref3"},{"journal-title":"32-bit microcontrollers for automotive and industrial applications Issue","first-page":"11","year":"0","key":"ref6"},{"key":"ref5","article-title":"Automated test generation for post silicon microcontroller validation","author":"moharikar","year":"0","journal-title":"High Level Design Validation and Test Workshop (HLDVT) 2017 IEEE International"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICCCNT.2017.8203924"},{"journal-title":"Tricore 1 32-bit Unified Processor Core Instruction Set Vol2 Instruction Set V1 3 & V1 3 1 Architecture","first-page":"319","year":"0","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/DTIS.2017.7930165"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2017.35"}],"event":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","start":{"date-parts":[[2018,9,14]]},"location":"Kazan","end":{"date-parts":[[2018,9,17]]}},"container-title":["2018 IEEE East-West Design &amp; Test Symposium (EWDTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8502702\/8524135\/08524793.pdf?arnumber=8524793","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T21:45:15Z","timestamp":1643233515000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8524793\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,9]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/ewdts.2018.8524793","relation":{},"subject":[],"published":{"date-parts":[[2018,9]]}}}