{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,14]],"date-time":"2025-06-14T05:23:52Z","timestamp":1749878632885,"version":"3.28.0"},"reference-count":6,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,9]]},"DOI":"10.1109\/ewdts.2019.8884370","type":"proceedings-article","created":{"date-parts":[[2019,11,5]],"date-time":"2019-11-05T06:34:05Z","timestamp":1572935645000},"page":"1-5","source":"Crossref","is-referenced-by-count":7,"title":["Processing An Effective Method For Clock Tree Synthesis"],"prefix":"10.1109","author":[{"given":"Narek","family":"Avdalyan","sequence":"first","affiliation":[]},{"given":"Kamo","family":"Petrosyan","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1991.185269"},{"journal-title":"SoC Encounter User Guide Product Version 5 2","year":"2006","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/4.881198"},{"key":"ref5","first-page":"389","article-title":"Sizing of clock distribution networks for high performance cpu chips","author":"desai","year":"0","journal-title":"Proceedings of the 33rd Annual Conference on Design Automation"},{"journal-title":"Nitro-SoC User's Manual Software Version 2017 2","year":"2018","key":"ref2"},{"key":"ref1","article-title":"Physical Design Automation of Complex ASICs","volume":"15","author":"mohamed","year":"2018","journal-title":"IJCSI International Journal of Computer Science Issues"}],"event":{"name":"2019 IEEE East-West Design & Test Symposium (EWDTS)","start":{"date-parts":[[2019,9,13]]},"location":"Batumi, Georgia","end":{"date-parts":[[2019,9,16]]}},"container-title":["2019 IEEE East-West Design & Test Symposium (EWDTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8871308\/8884369\/08884370.pdf?arnumber=8884370","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,18]],"date-time":"2022-07-18T11:25:22Z","timestamp":1658143522000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8884370\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,9]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/ewdts.2019.8884370","relation":{},"subject":[],"published":{"date-parts":[[2019,9]]}}}