{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,1]],"date-time":"2026-03-01T05:07:06Z","timestamp":1772341626753,"version":"3.50.1"},"reference-count":31,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,9]]},"DOI":"10.1109\/ewdts.2019.8884408","type":"proceedings-article","created":{"date-parts":[[2019,11,5]],"date-time":"2019-11-05T11:34:05Z","timestamp":1572953645000},"page":"1-6","source":"Crossref","is-referenced-by-count":1,"title":["Associative Processors: Application, Operation, Implementation Problems"],"prefix":"10.1109","author":[{"given":"Egor","family":"Kuzmin","sequence":"first","affiliation":[]},{"given":"Nikolay","family":"Levchenko","sequence":"additional","affiliation":[]},{"given":"Anatoly","family":"Okunev","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref31","doi-asserted-by":"crossref","first-page":"305","DOI":"10.1109\/TETC.2016.2565262","article-title":"Approximate Computing Using Multiple-Access Single-Charge Associative Memory","volume":"6","author":"mohsen","year":"2018","journal-title":"IEEE Transactions on Emerging Topics in Computing"},{"key":"ref30","first-page":"1327","article-title":"Resistive configurable associative memory for approximate computing","author":"mohsen","year":"2016","journal-title":"Design Automation & Test in Europe Conference & Exhibition (DATE)"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3036669.3038242"},{"key":"ref11","article-title":"An FPGA based Associative Execution Unit","author":"petrescu","year":"2008","journal-title":"The XXXVIII-International Scientific Symposium Military Equipment and Technologies Research Agency"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2827262"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2018.08.006"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2014.2370055"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1126\/science.1254642"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2782087"},{"key":"ref17","article-title":"A generic FPGA based associative processor","author":"petrescu","year":"2009","journal-title":"17th International Conference on Control Systems and Computer Science"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2014.2374597"},{"key":"ref19","article-title":"Associative Processor","author":"yavits","year":"2014","journal-title":"Supplementary Material"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ewdts.2013.6673191"},{"key":"ref4","first-page":"655","article-title":"Global Distributed Associative Environment - Evolution of Parallel Dataflow Computing System “Buran","author":"ivannikov","year":"2018","journal-title":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08)"},{"key":"ref27","first-page":"373","article-title":"MASC: Ultra-Low Energy Multiple-Access Single-Charge TCAM for Approximate Computing","author":"mohsen imani","year":"2016","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2017.2746742"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2017.2746742"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2017.7918340"},{"key":"ref5","first-page":"187","article-title":"Dataflow Computing Model - Perspectives, Advantages and Implementation","author":"ivannikov","year":"2017","journal-title":"Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2016.7479183"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.7873\/date.2015.0579"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2013.220"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2950067.2950086"},{"key":"ref1","first-page":"29","article-title":"Dataflow computing model as a paradigm of future mainstream of software development","volume":"9","author":"zmejev","year":"2015","journal-title":"Informatics and Applications"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2003.1213482"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISPDC.2008.42"},{"key":"ref21","first-page":"826","article-title":"An FPGA Implementation of a Multi-comparand Multi-search Associative Processor","volume":"2438","author":"zbigniew","year":"0","journal-title":"Proc 12th Int Conf FPL 2002 Lect Notes in Comp Sci"},{"key":"ref24","first-page":"166","article-title":"Principles of work of the special operations unit of the associative memory module of parallel dataflow computing system","volume":"1","author":"yahontov","year":"2010","journal-title":"Proc Supercomputer technologies design programming application (SCT–2010)"},{"key":"ref23","article-title":"In-Place Associative Computing","author":"avidan","year":"0","journal-title":"Electronic Journal Presentation"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2008.4734933"},{"key":"ref25","article-title":"Low-Power Analog Associative Processors Employing Resonance-Type Current-Voltage Characteristics","author":"tu bui","year":"2010","journal-title":"Solid State Circuits Technologies"}],"event":{"name":"2019 IEEE East-West Design & Test Symposium (EWDTS)","location":"Batumi, Georgia","start":{"date-parts":[[2019,9,13]]},"end":{"date-parts":[[2019,9,16]]}},"container-title":["2019 IEEE East-West Design & Test Symposium (EWDTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8871308\/8884369\/08884408.pdf?arnumber=8884408","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,18]],"date-time":"2022-07-18T15:17:17Z","timestamp":1658157437000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8884408\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,9]]},"references-count":31,"URL":"https:\/\/doi.org\/10.1109\/ewdts.2019.8884408","relation":{},"subject":[],"published":{"date-parts":[[2019,9]]}}}