{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,20]],"date-time":"2026-07-20T19:12:47Z","timestamp":1784574767519,"version":"3.55.0"},"reference-count":20,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,11,13]],"date-time":"2024-11-13T00:00:00Z","timestamp":1731456000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,11,13]],"date-time":"2024-11-13T00:00:00Z","timestamp":1731456000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,11,13]]},"DOI":"10.1109\/ewdts63723.2024.10873686","type":"proceedings-article","created":{"date-parts":[[2025,2,18]],"date-time":"2025-02-18T18:15:38Z","timestamp":1739902538000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["Physical-Design Aware Scan Cell Reordering for Low Power Testing"],"prefix":"10.1109","author":[{"given":"Rohit","family":"Badjatya","sequence":"first","affiliation":[{"name":"Indian Institute of Technology Bombay,Dept. of Electrical Engineering,Mumbai,India"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"family":"Vinay","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Bombay,Dept. of Electrical Engineering,Mumbai,India"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Rahul","family":"Kumar","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Bombay,Dept. of Electrical Engineering,Mumbai,India"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jaynarayan T","family":"Tudu","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Tirupati, India,Dept. of Computer Science Engineering,Tirupati,India"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Masahiro","family":"Fujita","sequence":"additional","affiliation":[{"name":"University of Tokyo,Dept. of Electrical Engineering,Tokyo,Japan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Virendra","family":"Singh","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Bombay,Dept. of Electrical Engineering,Mumbai,India"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/test.1999.805617"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/aspdac.2006.1594759"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/43.736572"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ets.2009.36"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2004.1386971"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041833"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2015.8"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2735864"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2020.3004371"},{"key":"ref10","first-page":"73","article-title":"Graph theoretic approach for scan cell reordering to minimize peak shift power","volume-title":"Proceedings of the 20th symposium on Great lakes symposium on VLSI (GLSVLSI \u201910). Association for Computing Machinery","author":"Tudu"},{"issue":"18","key":"ref11","doi-asserted-by":"crossref","first-page":"6111","DOI":"10.3390\/s21186111","article-title":"Low-Power Scan Correlation-Aware Scan Cluster Reordering for Wireless Sensor Networks","volume":"21","author":"Lee","year":"2021","journal-title":"Sensors"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ITC-Asia.2019.00026"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1270874"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/DELTA.2004.10009"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7168712"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2019.8791516"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2017.8242049"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2017.37"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ITC50671.2022.00052"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"329","DOI":"10.1007\/s10836-014-5453-9","article-title":"Low-Power Scan Testing: A Scan Chain Partitioning and Scan Hold Based Technique","volume":"30","author":"Arvaniti","year":"2014","journal-title":"J Electron Test"}],"event":{"name":"2024 IEEE East-West Design &amp; Test Symposium (EWDTS)","location":"Yerevan, Armenia","start":{"date-parts":[[2024,11,13]]},"end":{"date-parts":[[2024,11,17]]}},"container-title":["2024 IEEE East-West Design &amp;amp; Test Symposium (EWDTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10873596\/10873598\/10873686.pdf?arnumber=10873686","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,20]],"date-time":"2025-02-20T19:54:04Z","timestamp":1740081244000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10873686\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,11,13]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/ewdts63723.2024.10873686","relation":{},"subject":[],"published":{"date-parts":[[2024,11,13]]}}}