{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T22:00:17Z","timestamp":1725400817458},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,9]]},"DOI":"10.1109\/fdl.2008.4641431","type":"proceedings-article","created":{"date-parts":[[2008,10,14]],"date-time":"2008-10-14T15:14:34Z","timestamp":1223997274000},"page":"111-117","source":"Crossref","is-referenced-by-count":0,"title":["A requirements-driven simulation framework for communication infrastructures design"],"prefix":"10.1109","author":[{"given":"Alessandro","family":"Meroni","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vincenzo","family":"Rana","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marco Domenico","family":"Santambrogio","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Francesco","family":"Bruschi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"15","first-page":"1014","article-title":"an analytical performance model for the spidergon noc. advanced information networking and applications, 2007. aina '07","author":"moadeli","year":"2007","journal-title":"21st International Conference on (21-23"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379048"},{"year":"0","key":"13"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/ISSOC.2004.1411133"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/DELTA.2008.127"},{"journal-title":"OMNeT","year":"0","author":"vargas","key":"12"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.134"},{"year":"0","key":"2"},{"year":"0","key":"1"},{"key":"10","article-title":"nocgen:a template based reuse methodology for networks on chip architecture. vlsi design","author":"chan","year":"2004","journal-title":"Proceedings 17th International Conference on (2004) 717-720"},{"key":"7","first-page":"323","article-title":"fast, accurate and detailed noc simulations. networks-on-chip, 2007. nocs 2007","author":"wolkotte","year":"2007","journal-title":"First International Symposium on (7-9"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2005.1466128"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/1188275.1188283"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/2.976921"},{"journal-title":"Hermes An infrastructure for low area overhead packet-switching networks on chip","year":"2004","author":"moraes","key":"9"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TENCON.2007.4428942"}],"event":{"name":"Design Languages (FDL)","start":{"date-parts":[[2008,9,23]]},"location":"Stuttgart","end":{"date-parts":[[2008,9,25]]}},"container-title":["2008 Forum on Specification, Verification and Design Languages"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4636106\/4641405\/04641431.pdf?arnumber=4641431","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,16]],"date-time":"2017-03-16T16:02:37Z","timestamp":1489680157000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4641431\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,9]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/fdl.2008.4641431","relation":{},"subject":[],"published":{"date-parts":[[2008,9]]}}}