{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,2]],"date-time":"2025-11-02T14:21:33Z","timestamp":1762093293412,"version":"build-2065373602"},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,9,13]],"date-time":"2023-09-13T00:00:00Z","timestamp":1694563200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,9,13]],"date-time":"2023-09-13T00:00:00Z","timestamp":1694563200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,9,13]]},"DOI":"10.1109\/fdl59689.2023.10272204","type":"proceedings-article","created":{"date-parts":[[2023,10,9]],"date-time":"2023-10-09T18:23:26Z","timestamp":1696875806000},"page":"1-8","source":"Crossref","is-referenced-by-count":7,"title":["Enhancing Compiler-Driven HDL Design with Automatic Waveform Analysis"],"prefix":"10.1109","author":[{"given":"Frans","family":"Skarman","sequence":"first","affiliation":[{"name":"Link&#x00F6;ping University,Link&#x00F6;ping,Sweden"}]},{"given":"Lucas","family":"Klemmer","sequence":"additional","affiliation":[{"name":"Johannes Kepler University,Linz,Austria"}]},{"given":"Oscar","family":"Gustafsson","sequence":"additional","affiliation":[{"name":"Link&#x00F6;ping University,Link&#x00F6;ping,Sweden"}]},{"given":"Daniel","family":"Gro\u00dfe","sequence":"additional","affiliation":[{"name":"Johannes Kepler University,Linz,Austria"}]}],"member":"263","reference":[{"journal-title":"Digital circuits in cAaSH","year":"2015","author":"baaij","key":"ref13"},{"journal-title":"Amaranth hdl","year":"2022","key":"ref12"},{"journal-title":"Silicene","year":"2022","author":"lefebvre","key":"ref15"},{"journal-title":"PipelineC","year":"2022","author":"kemmerer","key":"ref14"},{"journal-title":"SpinalHDL","year":"2022","key":"ref11"},{"key":"ref10","doi-asserted-by":"crossref","first-page":"184","DOI":"10.1145\/367177.367199","article-title":"Recursive functions of symbolic expressions and their computation by machine, Part I","volume":"3","author":"mccarthy","year":"1960","journal-title":"Commun ACM"},{"key":"ref2","first-page":"1","author":"shah","year":"2019","journal-title":"Yosys+nextpnr An open source framework from Verilog to bitstream for commercial FPGAs"},{"journal-title":"Yosys Open SYnthesis Suite","year":"0","author":"wolf","key":"ref1"},{"journal-title":"Specification for the firrtl language","year":"2016","author":"li","key":"ref17"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203780"},{"journal-title":"Wishbone B4","year":"2010","key":"ref8"},{"journal-title":"SPADE","year":"2023","author":"skarman","key":"ref7"},{"key":"ref9","article-title":"Spade: An expression-based HDL with pipelines","author":"skarman","year":"0","journal-title":"Workshop on Open Source Design Automation (OSDA)"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC52403.2022.9712600"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228584"},{"key":"ref6","article-title":"Programmable analysis of RISC-V processor simulations using WAL","author":"klemmer","year":"2022","journal-title":"DVCon Europe"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530623"}],"event":{"name":"2023 Forum on Specification & Design Languages (FDL)","start":{"date-parts":[[2023,9,13]]},"location":"Turin, Italy","end":{"date-parts":[[2023,9,15]]}},"container-title":["2023 Forum on Specification &amp; Design Languages (FDL)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10272030\/10272044\/10272204.pdf?arnumber=10272204","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,30]],"date-time":"2023-10-30T18:38:35Z","timestamp":1698691115000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10272204\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,9,13]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/fdl59689.2023.10272204","relation":{},"subject":[],"published":{"date-parts":[[2023,9,13]]}}}