{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,1]],"date-time":"2025-10-01T15:56:19Z","timestamp":1759334179131,"version":"build-2065373602"},"reference-count":20,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,9,10]],"date-time":"2025-09-10T00:00:00Z","timestamp":1757462400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,9,10]],"date-time":"2025-09-10T00:00:00Z","timestamp":1757462400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100010002","name":"Ministry of Education","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100010002","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,9,10]]},"DOI":"10.1109\/fdl68117.2025.11165398","type":"proceedings-article","created":{"date-parts":[[2025,9,23]],"date-time":"2025-09-23T17:24:10Z","timestamp":1758648250000},"page":"1-7","source":"Crossref","is-referenced-by-count":0,"title":["ForMAt: Formal Verification of Scalable Multiply and Accumulate Units"],"prefix":"10.1109","author":[{"given":"Lennart","family":"Weingarten","sequence":"first","affiliation":[{"name":"University of Bremen,Department of Computer Science"}]},{"given":"Kamalika","family":"Datta","sequence":"additional","affiliation":[{"name":"University of Bremen,Department of Computer Science"}]},{"given":"Rolf","family":"Drechsler","sequence":"additional","affiliation":[{"name":"University of Bremen,Department of Computer Science"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2009113"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/DISCOVER52564.2021.9663665"},{"article-title":"Achieving end-to-end formal verification of large floating-point dot product accumulate systolic units","volume-title":"Design and Verification Conference & Exhibition","author":"Morini","key":"ref3"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1986.1676819"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379017"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240837"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.23919\/FMCAD.2019.8894250"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/s10703-018-00329-2"},{"key":"ref9","first-page":"185:1","article-title":"RevSCA: Using Reverse Engineering to Bring Light into Backward Rewriting for Big and Dirty Multipliers","volume-title":"Design Automation Conference","author":"Mahzoon"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218721"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3083682"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.34727\/2024\/isbn.978-3-85448-065-5_32"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2024.3442987"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.23919\/DATE58400.2024.10546568"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISED63599.2024.10957015"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.23919\/DATE64628.2025.10992946"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147048"},{"article-title":"Yosys Open SYnthesis Suite","year":"2024","author":"Wolf","key":"ref18"},{"year":"2024","key":"ref19","article-title":"Genus(TM) Synthesis Solution - Cadence Design Systems, Inc"},{"key":"ref20","first-page":"105","article-title":"ASAP7: A 7-nm finFET predictive process design kit","volume-title":"Microelectronics Journal","volume":"53","author":"Clark","year":"2016"}],"event":{"name":"2025 Forum on Specification &amp; Design Languages (FDL)","start":{"date-parts":[[2025,9,10]]},"location":"St. Goar, Germany","end":{"date-parts":[[2025,9,12]]}},"container-title":["2025 Forum on Specification &amp;amp; Design Languages (FDL)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11165265\/11165266\/11165398.pdf?arnumber=11165398","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,9,30]],"date-time":"2025-09-30T13:34:32Z","timestamp":1759239272000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11165398\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,9,10]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/fdl68117.2025.11165398","relation":{},"subject":[],"published":{"date-parts":[[2025,9,10]]}}}