{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T07:52:10Z","timestamp":1729669930050,"version":"3.28.0"},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,11]]},"DOI":"10.1109\/fmcad.2009.5351130","type":"proceedings-article","created":{"date-parts":[[2009,12,11]],"date-time":"2009-12-11T18:55:16Z","timestamp":1260557716000},"page":"144-151","source":"Crossref","is-referenced-by-count":6,"title":["Scaling VLSI design debugging with interpolation"],"prefix":"10.1109","author":[{"given":"Brian","family":"Keng","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andreas","family":"Veneris","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-540-45069-6_1","article-title":"Interpolation and SAT-based model checking","author":"mcmillan","year":"2003","journal-title":"Computer Aided Verification"},{"journal-title":"Opencores org","year":"2007","key":"22"},{"article-title":"Searching for truth: Techniques for satisfiability of Boolean formulas","year":"2003","author":"zhang","key":"17"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.2307\/2963593"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2013998"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/368273.368557"},{"key":"13","article-title":"A performance-driven QBF-based on iterative logic array representation with applications to verification, debug and test","author":"mangassarian","year":"2007","journal-title":"Int'l Conf on CAD"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/FMCAD.2008.ECP.9"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/FAMCAD.2007.26"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1145\/1366110.1366131"},{"key":"21","first-page":"502","article-title":"An extensible SAT-solver","author":"ee?n","year":"2003","journal-title":"Int'l Conf on Theory and Applications of Satisfiability Testing"},{"key":"3","first-page":"142","article-title":"A framework for constrained functional verification","author":"yuan","year":"2003","journal-title":"Int'l Conf on CAD"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1007\/s10817-007-9084-z"},{"key":"2","first-page":"118","article-title":"Bounded model checking","volume":"58","author":"biere","year":"2003","journal-title":"Advances in Computers"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-0302-6"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.852031"},{"key":"7","doi-asserted-by":"crossref","first-page":"5","DOI":"10.1007\/978-3-540-70545-1_3","article-title":"Assertion-based verification: Industry myths to realities (invited tutorial)","author":"foster","year":"2008","journal-title":"Computer Aided Verification"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2005.1560216"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2004.1382631"},{"key":"4","first-page":"159","article-title":"Scalable automated verification via expert-system guided transformations","author":"mony","year":"2004","journal-title":"Formal Methods in CAD"},{"key":"9","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4615-5693-0","author":"huang","year":"1998","journal-title":"Formal Equivalence Checking and Design Debugging"},{"journal-title":"Digital Systems Testing and Testable Design","year":"1990","author":"abramovici","key":"8"}],"event":{"name":"2009 Formal Methods in Computer-Aided Design (FMCAD)","start":{"date-parts":[[2009,11,15]]},"location":"Austin, TX, USA","end":{"date-parts":[[2009,11,18]]}},"container-title":["2009 Formal Methods in Computer-Aided Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5344684\/5351113\/05351130.pdf?arnumber=5351130","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,24]],"date-time":"2019-05-24T12:48:22Z","timestamp":1558702102000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5351130\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,11]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/fmcad.2009.5351130","relation":{},"subject":[],"published":{"date-parts":[[2009,11]]}}}