{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,21]],"date-time":"2025-04-21T04:43:43Z","timestamp":1745210623451,"version":"3.28.0"},"reference-count":6,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/fpga.2002.1106688","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T20:51:07Z","timestamp":1056574267000},"page":"291-292","source":"Crossref","is-referenced-by-count":4,"title":["Fast and guaranteed C compilation onto the PACT-XPP\/spl trade\/ reconfigurable computing platform"],"prefix":"10.1109","author":[{"given":"J.M.P.","family":"Cardoso","sequence":"first","affiliation":[]},{"given":"M.","family":"Weinhardt","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/43.908452"},{"key":"ref3","article-title":"PACT-XPP &#x2013; A Self-reconfigurable Data Processing Architecture","author":"baumgarte","year":"0","journal-title":"Journal of Supercomputing"},{"key":"ref6","article-title":"A Novel Algorithm Combining Temporal Partitioning and Sharing of Functional Units","author":"cardoso","year":"2001","journal-title":"Proc IEEE Symp Field-Programmable Custom Computing Machines (FCCM 01)"},{"key":"ref5","article-title":"SUIF: An Infrastructure for Research on Parallelizing and Optimizing Compilers","volume":"29","author":"wilson","year":"1996","journal-title":"ACM SIGPLAN Notices"},{"journal-title":"Release 2 0","article-title":"The XPP White Paper","year":"2001","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2001.915091"}],"event":{"name":"10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines. FCCM 2002","acronym":"FPGA-02","location":"Napa, CA, USA"},"container-title":["Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8168\/24313\/01106688.pdf?arnumber=1106688","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T18:15:28Z","timestamp":1489428928000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1106688\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/fpga.2002.1106688","relation":{},"subject":[]}}