{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T08:30:50Z","timestamp":1725438650460},"reference-count":3,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/fpga.2002.1106696","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T20:51:07Z","timestamp":1056574267000},"page":"309-310","source":"Crossref","is-referenced-by-count":2,"title":["The design of the Amalgam reconfigurable cluster"],"prefix":"10.1109","author":[{"given":"J.D.","family":"Walstrom","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.J.","family":"Cook","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.B.","family":"Gottlieb","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.","family":"Ferrera","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Chi-Wei Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N.P.","family":"Carter","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1997.624604"},{"key":"ref2","first-page":"87","article-title":"The Chimaera Reconfigurable Unit","author":"hauck","year":"1997","journal-title":"Proc FCCM"},{"key":"ref1","first-page":"146","article-title":"The M-Machine Multi-computer","author":"fillo","year":"1995","journal-title":"Proc ISCA"}],"event":{"name":"10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines. FCCM 2002","acronym":"FPGA-02","location":"Napa, CA, USA"},"container-title":["Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8168\/24313\/01106696.pdf?arnumber=1106696","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T12:21:17Z","timestamp":1489407677000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1106696\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":3,"URL":"https:\/\/doi.org\/10.1109\/fpga.2002.1106696","relation":{},"subject":[]}}