{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,19]],"date-time":"2026-01-19T09:30:38Z","timestamp":1768815038439,"version":"3.49.0"},"reference-count":24,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/fpga.2003.1227254","type":"proceedings-article","created":{"date-parts":[[2003,10,31]],"date-time":"2003-10-31T09:39:17Z","timestamp":1067593157000},"page":"185-194","source":"Crossref","is-referenced-by-count":40,"title":["Floating point unit generation and evaluation for FPGAs"],"prefix":"10.1109","author":[{"family":"Jian Liang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"R.","family":"Tessier","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"O.","family":"Mencer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","author":"koren","year":"1998","journal-title":"Computer Arithmetic Algorithms"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.2002.1106673"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1998.707898"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1996.564761"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.2002.1106662"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1998.707894"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/92.920835"},{"key":"ref17","article-title":"Nallatech, Inc","year":"0","journal-title":"IEEE754 Floating Point Core 2001"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.1997.614891"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/92.273153"},{"key":"ref4","article-title":"Digital Core Design, Inc","year":"2001","journal-title":"Alliance Core Data Sheet DFPADD Floating Point Adder"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/12.805157"},{"key":"ref6","author":"farmwald","year":"1981","journal-title":"On the design of high performance digital arithmetic units"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/92.311646"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1147\/rd.341.0071"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-46117-5_55"},{"key":"ref2","article-title":"A Library of Parameterized Floating Point Modules and Their Use","author":"belanovi\u00f3","year":"2002","journal-title":"Proc Int Conf Field Programmable Logic and Applications"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/92.661260"},{"key":"ref9","article-title":"Institute of Electrical and Electronics Engineers","year":"1984","journal-title":"IEEE 754 Standard for Binary Floating-Point Arithmetic"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/5992.852391"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/4.508263"},{"key":"ref21","article-title":"Leading-one prediction, implementation, generalization and application","author":"quach","year":"1991","journal-title":"Technical Report CSL-TR-91&#x2013;501"},{"key":"ref24","article-title":"Xilinx Corporation","year":"2002","journal-title":"ISE Logic Design Tools"},{"key":"ref23","author":"waser","year":"1982","journal-title":"Introduction to Arithmetic for Digital Systems Designers New York Holt Reinhart and Winston"}],"event":{"name":"11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines. FCCM 2003","location":"Napa, CA, USA","acronym":"FPGA-03"},"container-title":["11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8700\/27544\/01227254.pdf?arnumber=1227254","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T20:15:50Z","timestamp":1489436150000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1227254\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/fpga.2003.1227254","relation":{},"subject":[]}}