{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,19]],"date-time":"2025-03-19T13:40:30Z","timestamp":1742391630924},"reference-count":8,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/fpga.2003.1227275","type":"proceedings-article","created":{"date-parts":[[2003,10,31]],"date-time":"2003-10-31T09:39:17Z","timestamp":1067593157000},"page":"290-291","source":"Crossref","is-referenced-by-count":1,"title":["An estimation and simulation framework for energy efficient design using platform FPGAs"],"prefix":"10.1109","author":[{"given":"S.","family":"Mohanty","sequence":"first","affiliation":[]},{"family":"Jingzhao Ou","sequence":"additional","affiliation":[]},{"given":"V.K.","family":"Prasanna","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Modelsim Model Technoloaies","year":"0","key":"ref4"},{"journal-title":"Model-based Intezrated Simulation","year":"0","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASIC.2002.1158049"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2002.1030706"},{"journal-title":"Xilinx Application Note Virtex-II Series and Xilinx ISE 4 1i Design Environment","year":"0","key":"ref8"},{"journal-title":"System Level Synthesis of Adaptive Computing Systems","year":"2001","author":"neema","key":"ref7"},{"journal-title":"Generic modeling environment","year":"0","key":"ref2"},{"key":"ref1","article-title":"Domain-specific modeling for rapid system-wide energy estimation of reconfigurable architectures","author":"choi","year":"2002","journal-title":"Engineering of Reconfigurable Systems and Algorithms"}],"event":{"name":"11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines. FCCM 2003","acronym":"FPGA-03","location":"Napa, CA, USA"},"container-title":["11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8700\/27544\/01227275.pdf?arnumber=1227275","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T14:18:14Z","timestamp":1489414694000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1227275\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/fpga.2003.1227275","relation":{},"subject":[]}}