{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,21]],"date-time":"2025-08-21T17:30:42Z","timestamp":1755797442305,"version":"3.44.0"},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2005,1,1]],"date-time":"2005-01-01T00:00:00Z","timestamp":1104537600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2005,1,1]],"date-time":"2005-01-01T00:00:00Z","timestamp":1104537600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2005]]},"DOI":"10.1109\/fpl.2005.1515706","type":"proceedings-article","created":{"date-parts":[[2005,10,12]],"date-time":"2005-10-12T13:27:51Z","timestamp":1129123671000},"page":"101-105","source":"Crossref","is-referenced-by-count":0,"title":["An 11 GHz FPGA with test applications"],"prefix":"10.1109","author":[{"given":"C.","family":"You","sequence":"first","affiliation":[{"name":"ECSE Dept., Rensselaer Polytech. Inst., Troy, NY, USA"}]},{"family":"Jong-Ru Guo","sequence":"additional","affiliation":[{"name":"ECSE Dept., Rensselaer Polytech. Inst., Troy, NY, USA"}]},{"given":"M.","family":"Chu","sequence":"additional","affiliation":[{"name":"ECSE Dept., Rensselaer Polytech. Inst., Troy, NY, USA"}]},{"family":"Kuan Zhou","sequence":"additional","affiliation":[{"name":"ECSE Dept., Rensselaer Polytech. Inst., Troy, NY, USA"}]},{"given":"R.P.","family":"Kraft","sequence":"additional","affiliation":[{"name":"ECSE Dept., Rensselaer Polytech. Inst., Troy, NY, USA"}]},{"given":"J.F.","family":"McDonald","sequence":"additional","affiliation":[{"name":"ECSE Dept., Rensselaer Polytech. Inst., Troy, NY, USA"}]},{"given":"B.","family":"Goda","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1999.803679"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1995.518230"},{"journal-title":"XC6200 Field Programmable Gate Arrays","year":"1999","key":"10"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1994.315596"},{"journal-title":"SiGe HBT BiCMOS field programmable gate arrays for fast reconfigurable computing","year":"2001","author":"goda","key":"7"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:20000468"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1993.393329"},{"key":"4","article-title":"Using programmable logic to accelerate DSP functions","author":"knapp","year":"1998","journal-title":"Xilinx Application Note"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/4.18600"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/4.121549"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/92.920833"}],"event":{"name":"Proceedings. 2005 International Conference on Field Programmable Logic and Applications","start":{"date-parts":[[2005,8,24]]},"location":"Tampere, Finland","end":{"date-parts":[[2005,8,26]]}},"container-title":["International Conference on Field Programmable Logic and Applications, 2005."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10158\/32467\/01515706.pdf?arnumber=1515706","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,18]],"date-time":"2025-08-18T19:27:01Z","timestamp":1755545221000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/1515706\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/fpl.2005.1515706","relation":{},"subject":[],"published":{"date-parts":[[2005]]}}}