{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T04:07:24Z","timestamp":1750133244754,"version":"3.41.0"},"reference-count":14,"publisher":"IEEE","license":[{"start":{"date-parts":[[2005,1,1]],"date-time":"2005-01-01T00:00:00Z","timestamp":1104537600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2005,1,1]],"date-time":"2005-01-01T00:00:00Z","timestamp":1104537600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2005]]},"DOI":"10.1109\/fpl.2005.1515720","type":"proceedings-article","created":{"date-parts":[[2005,10,12]],"date-time":"2005-10-12T17:27:51Z","timestamp":1129138071000},"page":"185-190","source":"Crossref","is-referenced-by-count":4,"title":["Evaluation of ray casting on processor like reconfigurable architectures"],"prefix":"10.1109","author":[{"given":"T.","family":"Oppold","sequence":"first","affiliation":[{"name":"WSL\/TI, Univ. Tubingen, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Schweizer","sequence":"additional","affiliation":[{"name":"WSL\/TI, Univ. Tubingen, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Kuhn","sequence":"additional","affiliation":[{"name":"WSL\/TI, Univ. Tubingen, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"W.","family":"Rosenstiel","sequence":"additional","affiliation":[{"name":"WSL\/TI, Univ. Tubingen, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"U.","family":"Kanus","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"W.","family":"Strasser","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"13","article-title":"Voxelcache: A cache-based memory architecture for volume graphics","author":"kanus","year":"2003","journal-title":"Eurographics\/SIGGRAPH Workshop on Graphics Hardware"},{"key":"14","article-title":"Evaluation of temporal-spatial voltage scaling for processor-like reconfigurable architectures","author":"schweizer","year":"2005","journal-title":"European Design Conference"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1145\/360825.360839"},{"key":"12","article-title":"Cost functions for the design of dynamically reconfigurable processor architectures","author":"oppold","year":"2004","journal-title":"Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI)"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/383507.383515"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1145\/311535.311563"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/378456.378484"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/PCEE.2004.1"},{"key":"7","article-title":"A dynamically reconfigurable processor architecture","author":"motomura","year":"2002","journal-title":"Microprocessor Forum (MPF)"},{"key":"6","article-title":"VIZARD II: A reconfigurable interactive volume rendering system","author":"mei\ufffdner","year":"2002","journal-title":"Eurographics\/SIGGRAPH Workshop on Graphics Hardware"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/VV.2000.10014"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/VISUAL.2000.885694"},{"key":"9","article-title":"Overview of the Intel reconfigurable communications architecture","author":"chen","year":"2004","journal-title":"Workshop on Application Specific Processors (WASP'05)"},{"key":"8","article-title":"PACT XPP - A self-reconfigurable data processing architecture","author":"baumgarte","year":"2001","journal-title":"International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)"}],"event":{"name":"Proceedings. 2005 International Conference on Field Programmable Logic and Applications","start":{"date-parts":[[2005,8,24]]},"location":"Tampere, Finland","end":{"date-parts":[[2005,8,26]]}},"container-title":["International Conference on Field Programmable Logic and Applications, 2005."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10158\/32467\/01515720.pdf?arnumber=1515720","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,16]],"date-time":"2025-06-16T18:44:28Z","timestamp":1750099468000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/1515720\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/fpl.2005.1515720","relation":{},"subject":[],"published":{"date-parts":[[2005]]}}}