{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:49:25Z","timestamp":1729633765586,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/fpl.2005.1515774","type":"proceedings-article","created":{"date-parts":[[2005,10,12]],"date-time":"2005-10-12T17:27:51Z","timestamp":1129138071000},"page":"515-518","source":"Crossref","is-referenced-by-count":7,"title":["Statistical power estimation for FPGAs"],"prefix":"10.1109","author":[{"given":"E.","family":"Todorovich","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"E.","family":"Boemo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"Angarita","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J.","family":"Valls","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"15","DOI":"10.1007\/3-540-46117-5_36"},{"doi-asserted-by":"publisher","key":"16","DOI":"10.1109\/TCSII.2003.809716"},{"doi-asserted-by":"publisher","key":"13","DOI":"10.1109\/92.532037"},{"doi-asserted-by":"publisher","key":"14","DOI":"10.1109\/ICCAD.1997.643581"},{"doi-asserted-by":"publisher","key":"11","DOI":"10.1109\/92.219908"},{"doi-asserted-by":"publisher","key":"12","DOI":"10.1155\/1998\/46819"},{"key":"3","article-title":"Virtex power estimator user guide","volume":"152","author":"tan","year":"1999","journal-title":"XAPP"},{"key":"2","first-page":"73","article-title":"Design technologies for low power VLSI","volume":"36","author":"pedram","year":"1997","journal-title":"Encyclopedia of Computer Science and Technology"},{"doi-asserted-by":"publisher","key":"1","DOI":"10.1109\/101.294740"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1109\/TVLSI.2004.831478"},{"doi-asserted-by":"publisher","key":"7","DOI":"10.1145\/503048.503072"},{"year":"0","journal-title":"Development System Reference Guide","article-title":"Chapter 11: XPower","key":"6"},{"year":"1998","author":"osmulski","journal-title":"Implementation and Evaluation of a Power Prediction Model for a Field Programmable Gate Array","key":"5"},{"key":"4","first-page":"29","article-title":"XC4000XL power calculation","year":"2000","journal-title":"Xcell"},{"doi-asserted-by":"publisher","key":"9","DOI":"10.1145\/611843.611844"},{"key":"8","doi-asserted-by":"crossref","first-page":"353","DOI":"10.1007\/3-540-45716-X_35","article-title":"Measurement of the switching activity of CMOS digital circuits at the gate level","author":"baena","year":"2002","journal-title":"Lecture Notes in Computer Science"}],"event":{"name":"International Conference on Field Programmable Logic and Applications, 2005.","location":"Tampere, Finland"},"container-title":["International Conference on Field Programmable Logic and Applications, 2005."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10158\/32467\/01515774.pdf?arnumber=1515774","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,17]],"date-time":"2017-06-17T00:02:57Z","timestamp":1497657777000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1515774\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/fpl.2005.1515774","relation":{},"subject":[]}}