{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:47:53Z","timestamp":1773247673344,"version":"3.50.1"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,8]]},"DOI":"10.1109\/fpl.2009.5272304","type":"proceedings-article","created":{"date-parts":[[2009,9,30]],"date-time":"2009-09-30T18:42:09Z","timestamp":1254336129000},"page":"224-229","source":"Crossref","is-referenced-by-count":18,"title":["Recursion in reconfigurable computing: A survey of implementation approaches"],"prefix":"10.1109","author":[{"given":"Iouliia","family":"Skliarova","sequence":"first","affiliation":[]},{"given":"Valery","family":"Sklyarov","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"15","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-45574-4_3"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1145\/1366110.1366143"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2006.134"},{"key":"11","article-title":"mapping recursive functions to reconfigurable hardware","author":"ferizis","year":"2005"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2008.4629900"},{"key":"3","doi-asserted-by":"crossref","first-page":"450","DOI":"10.1007\/978-3-540-48302-1_52","article-title":"hardware implementation techniques for recursive calls and loops","author":"maruyama","year":"1999","journal-title":"Proc 9th Int Workshop Field-Programmable Logic Applications FPL 99"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/MCISE.2003.1196311"},{"key":"1","author":"carrano","year":"2007","journal-title":"Data abstraction and problem solving with C++ Walls and mirrors"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2006.311226"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.2008.51"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2005.1515728"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2010.30"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.2000.903397"},{"key":"9","article-title":"mapping basic recursive structures to runtime reconfigurable hardware","author":"elgindy","year":"2004","journal-title":"Technical Report"},{"key":"8","doi-asserted-by":"crossref","first-page":"906","DOI":"10.1007\/978-3-540-30117-2_97","article-title":"mapping basic recursive structures to runtime reconfigurable hardware","author":"elgindy","year":"2004","journal-title":"the 11th International Conference on Field Programmable Logic and Application FPL"}],"event":{"name":"2009 International Conference on Field Programmable Logic and Applications (FPL)","location":"Prague, Czech Republic","start":{"date-parts":[[2009,8,31]]},"end":{"date-parts":[[2009,9,2]]}},"container-title":["2009 International Conference on Field Programmable Logic and Applications"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5247666\/5272229\/05272304.pdf?arnumber=5272304","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,22]],"date-time":"2019-05-22T23:33:02Z","timestamp":1558567982000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5272304\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,8]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/fpl.2009.5272304","relation":{},"subject":[],"published":{"date-parts":[[2009,8]]}}}