{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T20:38:14Z","timestamp":1725482294667},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,8]]},"DOI":"10.1109\/fpl.2009.5272515","type":"proceedings-article","created":{"date-parts":[[2009,9,30]],"date-time":"2009-09-30T18:42:09Z","timestamp":1254336129000},"page":"162-167","source":"Crossref","is-referenced-by-count":1,"title":["Optimal runtime reconfiguration strategies for systolic arrays"],"prefix":"10.1109","author":[{"given":"Arpith C.","family":"Jacob","sequence":"first","affiliation":[]},{"given":"Jeremy D.","family":"Buhler","sequence":"additional","affiliation":[]},{"given":"Roger D.","family":"Chamberlain","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.1994.331784"},{"key":"2","doi-asserted-by":"crossref","first-page":"657","DOI":"10.1201\/9781482276046-23","article-title":"advanced systolic design","author":"lavenier","year":"1999","journal-title":"Digital Signal Processing for Multimedia Systems"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1146\/annurev.genet.38.072902.091216"},{"key":"1","first-page":"229","article-title":"the systematic design of systolic arrays","author":"quinton","year":"1987","journal-title":"Automata Networks in Computer Science Theory and Applications"},{"key":"7","article-title":"dynamic reconfigurable computing","author":"brodie","year":"2003","journal-title":"Military and Aerospace Programmable Logic Devices"},{"journal-title":"VLSI Array Processors","year":"1987","author":"kung","key":"6"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2008.4580177"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1137\/0135006"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1038\/ng1794"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1016\/j.cell.2009.01.035"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1145\/1162618.1162626"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2007.4429951"}],"event":{"name":"2009 International Conference on Field Programmable Logic and Applications (FPL)","start":{"date-parts":[[2009,8,31]]},"location":"Prague, Czech Republic","end":{"date-parts":[[2009,9,2]]}},"container-title":["2009 International Conference on Field Programmable Logic and Applications"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5247666\/5272229\/05272515.pdf?arnumber=5272515","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,22]],"date-time":"2019-05-22T23:33:06Z","timestamp":1558567986000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5272515\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,8]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/fpl.2009.5272515","relation":{},"subject":[],"published":{"date-parts":[[2009,8]]}}}