{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,19]],"date-time":"2025-03-19T10:31:46Z","timestamp":1742380306041},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,8]]},"DOI":"10.1109\/fpl.2009.5272565","type":"proceedings-article","created":{"date-parts":[[2009,9,30]],"date-time":"2009-09-30T18:42:09Z","timestamp":1254336129000},"page":"6-11","source":"Crossref","is-referenced-by-count":20,"title":["MuCCRA-Cube: A 3D dynamically reconfigurable processor with inductive-coupling link"],"prefix":"10.1109","author":[{"given":"S.","family":"Saito","sequence":"first","affiliation":[]},{"given":"Y.","family":"Kohama","sequence":"additional","affiliation":[]},{"given":"Y.","family":"Sugimori","sequence":"additional","affiliation":[]},{"given":"Y.","family":"Hasegawa","sequence":"additional","affiliation":[]},{"given":"H.","family":"Matsutani","sequence":"additional","affiliation":[]},{"given":"T.","family":"Sano","sequence":"additional","affiliation":[]},{"given":"K.","family":"Kasuga","sequence":"additional","affiliation":[]},{"given":"Y.","family":"Yoshida","sequence":"additional","affiliation":[]},{"given":"K.","family":"Niitsu","sequence":"additional","affiliation":[]},{"given":"N.","family":"Miura","sequence":"additional","affiliation":[]},{"given":"T.","family":"Kuroda","sequence":"additional","affiliation":[]},{"given":"H.","family":"Amano","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.136"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2003.1234260"},{"key":"1","article-title":"c-based programmable-hw core \"stp engine\": current status and future","author":"motomura","year":"2008","journal-title":"IECE Technical Report"},{"key":"7","article-title":"muccra chips: configurable dynamically-reconfigurable processors","author":"amano","year":"2007","journal-title":"Proc of the ASSCC '07"},{"key":"6","first-page":"268","article-title":"three-dimensional integrated circuits for low-power high-bandwidth systems on a chip","author":"burns","year":"2001","journal-title":"Proc IEEE Int Solid-State Circuits Conf (ISSCC 01)"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373442"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696223"},{"key":"9","article-title":"discount: disable configuration technique for representing register and reducing configuration bits in dynamically reconfigurable architecture","author":"tunbunheng","year":"2007","journal-title":"Proc of SASIMI 2007"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2005.1568536"}],"event":{"name":"2009 International Conference on Field Programmable Logic and Applications (FPL)","start":{"date-parts":[[2009,8,31]]},"location":"Prague, Czech Republic","end":{"date-parts":[[2009,9,2]]}},"container-title":["2009 International Conference on Field Programmable Logic and Applications"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5247666\/5272229\/05272565.pdf?arnumber=5272565","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T22:54:58Z","timestamp":1489877698000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5272565\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,8]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/fpl.2009.5272565","relation":{},"subject":[],"published":{"date-parts":[[2009,8]]}}}