{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T08:29:38Z","timestamp":1729672178906,"version":"3.28.0"},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,8]]},"DOI":"10.1109\/fpl.2012.6339236","type":"proceedings-article","created":{"date-parts":[[2012,10,26]],"date-time":"2012-10-26T17:47:45Z","timestamp":1351273665000},"page":"20-25","source":"Crossref","is-referenced-by-count":4,"title":["Efficient and side-channel-secure block cipher implementation with custom instructions on FPGA"],"prefix":"10.1109","author":[{"given":"Suvarna","family":"Mane","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mostafa","family":"Taha","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Patrick","family":"Schaumont","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"19","DOI":"10.1109\/ReConFig.2010.80"},{"doi-asserted-by":"publisher","key":"22","DOI":"10.1109\/TCAD.2005.855939"},{"doi-asserted-by":"publisher","key":"17","DOI":"10.1007\/978-3-642-14992-4_7"},{"key":"18","first-page":"205","article-title":"A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions","author":"regazzoni","year":"2009","journal-title":"CHES"},{"doi-asserted-by":"publisher","key":"15","DOI":"10.1145\/2046707.2046722"},{"key":"16","first-page":"1","article-title":"Black-Box Side-Channel Attacks Highlight the Importance of Countermeasures - An Analysis of the Xilinx Virtex-4 and Virtex-5 Bitstream Encryption Mechanism","volume":"2012","author":"moradi","year":"0","journal-title":"CT-RSA"},{"key":"13","first-page":"61","article-title":"Side-Channel Analysis of Cryptographic RFIDs with Analog Demodulation","author":"kasper","year":"2011","journal-title":"RFIDSec"},{"key":"14","article-title":"Differential Power Analysis","author":"mangard","year":"2007","journal-title":"Power Analysis Attacks Revealing the Secrets of Smart Cards"},{"key":"11","article-title":"Software Implementation of Dual-Rail Representation","author":"hoogvorst","year":"2011","journal-title":"COSADE"},{"doi-asserted-by":"publisher","key":"12","DOI":"10.1109\/MC.2007.52"},{"doi-asserted-by":"publisher","key":"21","DOI":"10.1007\/978-3-642-27257-8_10"},{"doi-asserted-by":"publisher","key":"3","DOI":"10.1109\/FPL.2010.35"},{"doi-asserted-by":"publisher","key":"20","DOI":"10.1145\/1920261.1920293"},{"key":"2","doi-asserted-by":"crossref","first-page":"19","DOI":"10.1007\/978-3-642-27954-6_2","article-title":"Power Analysis of Atmel CryptoMemory - Recovering Keys from Secure EEPROMs","volume":"7178","author":"balasch","year":"2012","journal-title":"Lecture Notes in Computer Science"},{"doi-asserted-by":"publisher","key":"1","DOI":"10.1109\/ICCAD.2008.4681650"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1109\/TC.2010.104"},{"key":"7","first-page":"28","article-title":"Side Channel Cryptanalysis of a Higher Order Masking Scheme","author":"coron","year":"2007","journal-title":"CHES"},{"key":"6","article-title":"Virtual Secure Circuit: Porting Dual-Rail Precharge Techniques into Software on Multicore","author":"chen","year":"2010","journal-title":"IACR"},{"doi-asserted-by":"publisher","key":"5","DOI":"10.1145\/1878921.1878933"},{"key":"4","first-page":"398","article-title":"Towards Sound Approaches to Counteract Power-Analysis Attacks","author":"chari","year":"1999","journal-title":"Crypto"},{"doi-asserted-by":"publisher","key":"9","DOI":"10.1109\/TC.2008.109"},{"key":"8","first-page":"203","article-title":"On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoqCode Hopping Scheme","author":"eisenbarth","year":"2008","journal-title":"Crypto"}],"event":{"name":"2012 22nd International Conference on Field Programmable Logic and Applications (FPL)","start":{"date-parts":[[2012,8,29]]},"location":"Oslo, Norway","end":{"date-parts":[[2012,8,31]]}},"container-title":["22nd International Conference on Field Programmable Logic and Applications (FPL)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6330714\/6339128\/06339236.pdf?arnumber=6339236","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T21:57:11Z","timestamp":1497995831000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6339236\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,8]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/fpl.2012.6339236","relation":{},"subject":[],"published":{"date-parts":[[2012,8]]}}}