{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T08:52:56Z","timestamp":1725612776101},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,9]]},"DOI":"10.1109\/fpl.2013.6645498","type":"proceedings-article","created":{"date-parts":[[2013,10,31]],"date-time":"2013-10-31T00:10:16Z","timestamp":1383178216000},"page":"1-8","source":"Crossref","is-referenced-by-count":6,"title":["Improving autonomous soft-error tolerance of FPGA through LUT configuration bit manipulation"],"prefix":"10.1109","author":[{"given":"Anup","family":"Das","sequence":"first","affiliation":[]},{"given":"Shyamsundar","family":"Venkataraman","sequence":"additional","affiliation":[]},{"given":"Akash","family":"Kumar","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"15","first-page":"428","article-title":"A method to decompose multiple-output logic functions","author":"sasao","year":"2004","journal-title":"Proceedings 41st Design Automation Conference 2004 DAC"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/AICCSA.2007.370913"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2001.156117"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2003.1218874"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2011.5981545"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2011.69"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.281"},{"key":"2","article-title":"Correcting single-event upsets through virtex partial configuration","author":"carmichael","year":"0","journal-title":"Xilinx Corporation 2000 TABLE II FAULT-RATE (%) of COMBINATORIAL BENCHMARKS Benchmark FMD IPD LR+"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.229"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775997"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687422"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654113"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2010.5419873"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2004.1382552"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837401"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2011.25"}],"event":{"name":"2013 23rd International Conference on Field Programmable Logic and Applications (FPL)","start":{"date-parts":[[2013,9,2]]},"location":"Porto, Portugal","end":{"date-parts":[[2013,9,4]]}},"container-title":["2013 23rd International Conference on Field programmable Logic and Applications"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6632515\/6645482\/06645498.pdf?arnumber=6645498","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T01:22:23Z","timestamp":1490232143000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6645498\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,9]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/fpl.2013.6645498","relation":{},"subject":[],"published":{"date-parts":[[2013,9]]}}}