{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,28]],"date-time":"2025-10-28T10:41:42Z","timestamp":1761648102501,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,9]]},"DOI":"10.1109\/fpl.2013.6645571","type":"proceedings-article","created":{"date-parts":[[2013,10,30]],"date-time":"2013-10-30T20:10:16Z","timestamp":1383163816000},"page":"1-4","source":"Crossref","is-referenced-by-count":16,"title":["Towards bounded error recovery time in FPGA-based TMR circuits using dynamic partial reconfiguration"],"prefix":"10.1109","author":[{"given":"Ediz","family":"Cetin","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Oliver","family":"Diessel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lingkan","family":"Gong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Victor","family":"Lai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"3","DOI":"10.1109\/23.556861"},{"doi-asserted-by":"publisher","key":"2","DOI":"10.1109\/23.490893"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1145\/1723112.1723154"},{"year":"2000","author":"carmichael","journal-title":"Correcting Singleevent Upsets Through Virtex Partial Configuration","key":"1"},{"doi-asserted-by":"publisher","key":"7","DOI":"10.1109\/DFT.2007.25"},{"doi-asserted-by":"publisher","key":"6","DOI":"10.1109\/FPT.2011.6132703"},{"key":"5","volume":"1","author":"carmichael","year":"2001","journal-title":"Triple Module Redundancy Design Techniques for Virtex FPGAs"},{"doi-asserted-by":"publisher","key":"4","DOI":"10.1147\/rd.62.0200"},{"doi-asserted-by":"publisher","key":"9","DOI":"10.1109\/TC.2010.281"},{"doi-asserted-by":"publisher","key":"8","DOI":"10.1145\/1404371.1404426"},{"doi-asserted-by":"publisher","key":"11","DOI":"10.1109\/36.469491"}],"event":{"name":"2013 23rd International Conference on Field Programmable Logic and Applications (FPL)","start":{"date-parts":[[2013,9,2]]},"location":"Porto, Portugal","end":{"date-parts":[[2013,9,4]]}},"container-title":["2013 23rd International Conference on Field programmable Logic and Applications"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6632515\/6645482\/06645571.pdf?arnumber=6645571","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T21:32:09Z","timestamp":1490218329000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6645571\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,9]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/fpl.2013.6645571","relation":{},"subject":[],"published":{"date-parts":[[2013,9]]}}}