{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T09:16:49Z","timestamp":1725441409944},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,9]]},"DOI":"10.1109\/fpl.2014.6927485","type":"proceedings-article","created":{"date-parts":[[2014,10,22]],"date-time":"2014-10-22T21:13:21Z","timestamp":1414012401000},"page":"1-8","source":"Crossref","is-referenced-by-count":4,"title":["TransPar: Transformation based dynamic Parallelism for low power CGRAs"],"prefix":"10.1109","author":[{"given":"Syed M. A. H.","family":"Jafri","sequence":"first","affiliation":[]},{"given":"Guillermo","family":"Serrano","sequence":"additional","affiliation":[]},{"given":"Masoud","family":"Daneshtalab","sequence":"additional","affiliation":[]},{"given":"Naeem","family":"Abbas","sequence":"additional","affiliation":[]},{"given":"Ahmed","family":"Hemani","sequence":"additional","affiliation":[]},{"given":"Kolin","family":"Paul","sequence":"additional","affiliation":[]},{"given":"Juha","family":"Plosila","sequence":"additional","affiliation":[]},{"given":"Hannu","family":"Tenhunen","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/ISSOC.2005.1595646"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2011.166"},{"key":"17","first-page":"417","article-title":"Program phase and runtime distribution-aware online DVFS for combined Vdd\/Vbb scaling","author":"kim","year":"2009","journal-title":"Proc Design Automation and Test in Europe (DATE)"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2004.1393319"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-6460-1_11"},{"key":"16","doi-asserted-by":"crossref","first-page":"286","DOI":"10.1109\/IPDPS.2011.160","article-title":"Improving reconfigurable hardware energy efficiency and robustness via DVFS-scaled homogeneous MPSoC","author":"airoldi","year":"2011","journal-title":"Proc IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW)"},{"key":"13","first-page":"247","article-title":"CAPSULE: Hardware-assisted parallel execution of component-based programs","author":"palatin","year":"2006","journal-title":"Proc Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO)"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2007.4380681"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1007\/s10617-014-9128-7"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.19"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364579"},{"key":"3","first-page":"1","article-title":"Reusable context pipelining for low power coarse-grained reconfigurable architecture","author":"kim","year":"2008","journal-title":"Proc IEEE Int Symp Parallel and Distributed Processing IPDPS 2008"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2012.42"},{"journal-title":"Dynamically Reconfigurable Resource Array","year":"2012","author":"shami","key":"2"},{"key":"1","first-page":"1","article-title":"Implementing flexible reliability in a coarse-grained reconfigurable architecture","author":"alnajjar","year":"2012","journal-title":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-006-6743-5"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2013.6523597"},{"journal-title":"Runtime Parallelisation Switching for MPEG4 Encoder on MPSoC","year":"2007","author":"abbas","key":"6"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ICSAMOS.2006.300812"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9781139166980"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2011.6132719"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2013.6621112"}],"event":{"name":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","start":{"date-parts":[[2014,9,2]]},"location":"Munich, Germany","end":{"date-parts":[[2014,9,4]]}},"container-title":["2014 24th International Conference on Field Programmable Logic and Applications (FPL)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6913605\/6927322\/06927485.pdf?arnumber=6927485","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T22:53:14Z","timestamp":1498171994000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6927485\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,9]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/fpl.2014.6927485","relation":{},"subject":[],"published":{"date-parts":[[2014,9]]}}}