{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,25]],"date-time":"2026-01-25T07:03:05Z","timestamp":1769324585375,"version":"3.49.0"},"reference-count":24,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,8]]},"DOI":"10.1109\/fpl.2016.7577343","type":"proceedings-article","created":{"date-parts":[[2016,9,29]],"date-time":"2016-09-29T18:11:15Z","timestamp":1475172675000},"page":"1-9","source":"Crossref","is-referenced-by-count":12,"title":["Time-borrowing platform in the Xilinx UltraScale+ family of FPGAs and MPSoCs"],"prefix":"10.1109","author":[{"given":"Ilya","family":"Ganusov","sequence":"first","affiliation":[]},{"given":"Benjamin","family":"Devlin","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"159","DOI":"10.1145\/2847263.2847267","article-title":"The stratix TM 10 highly pipelined fpga architecture","author":"lewis","year":"2016","journal-title":"Proceedings of the 2016 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/43.310899"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1147\/rd.471.0057"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1993.580087"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/43.124419"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/43.541443"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1992.279401"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/503048.503067"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1055137.1055149"},{"key":"ref19","article-title":"Xilinx 28nm Generation Programmable Families","author":"taylor","year":"2010","journal-title":"Hot Chips 22"},{"key":"ref4","article-title":"Optimization","author":"gurobi","year":"2015","journal-title":"Gurobi Optimizer Reference Manual"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/12.55696"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2041845"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.1996.547519"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/BF01759032"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687471"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2009.5377666"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2016.18"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2435264.2435292"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2011.21"},{"key":"ref22","year":"2016","journal-title":"UltraScale Architecture and Product Overview"},{"key":"ref21","year":"2015","journal-title":"UltraScale Architecture Clocking Resources"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/1046192.1046198"},{"key":"ref23","year":"2016","journal-title":"Vivado Design Suite User Guide Design Flows Overview"}],"event":{"name":"2016 26th International Conference on Field Programmable Logic and Applications (FPL)","location":"Lausanne, Switzerland","start":{"date-parts":[[2016,8,29]]},"end":{"date-parts":[[2016,9,2]]}},"container-title":["2016 26th International Conference on Field Programmable Logic and Applications (FPL)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7573873\/7577295\/07577343.pdf?arnumber=7577343","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,24]],"date-time":"2017-06-24T20:00:17Z","timestamp":1498334417000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7577343\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,8]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/fpl.2016.7577343","relation":{},"subject":[],"published":{"date-parts":[[2016,8]]}}}