{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,27]],"date-time":"2026-03-27T07:15:09Z","timestamp":1774595709703,"version":"3.50.1"},"reference-count":27,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,9,1]],"date-time":"2025-09-01T00:00:00Z","timestamp":1756684800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,9,1]],"date-time":"2025-09-01T00:00:00Z","timestamp":1756684800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100004311","name":"Advanced Micro Devices, Inc.","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100004311","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,9,1]]},"DOI":"10.1109\/fpl68686.2025.00018","type":"proceedings-article","created":{"date-parts":[[2026,3,26]],"date-time":"2026-03-26T19:48:24Z","timestamp":1774554504000},"page":"46-54","source":"Crossref","is-referenced-by-count":0,"title":["FINN-GL: Generalized Mixed-Precision Extensions for FPGA-Accelerated LSTMS"],"prefix":"10.1109","author":[{"given":"Shashwat","family":"Khandelwal","sequence":"first","affiliation":[{"name":"Trinity College,Reconfigurable Computing Systems Lab, Electronic &#x0026; Electrical Engineering,Dublin,Ireland"}]},{"given":"Jakoba","family":"Petri-Koenig","sequence":"additional","affiliation":[{"name":"Advanced Micro Devices (AMD) Research,Dublin,Ireland"}]},{"given":"Thomas B.","family":"Preu\u00dfer","sequence":"additional","affiliation":[{"name":"Advanced Micro Devices (AMD) Research,Dublin,Ireland"}]},{"given":"Michaela","family":"Blott","sequence":"additional","affiliation":[{"name":"Advanced Micro Devices (AMD) Research,Dublin,Ireland"}]},{"given":"Shanker","family":"Shreejith","sequence":"additional","affiliation":[{"name":"Trinity College,Reconfigurable Computing Systems Lab, Electronic &#x0026; Electrical Engineering,Dublin,Ireland"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2019.2907260"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3242897"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1088\/1748-0221\/13\/07\/P07027"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1016\/j.renene.2022.12.123"},{"key":"ref5","volume-title":"ONNX"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2018.00024"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/3470567"},{"key":"ref8","article-title":"Streamlined deployment for quantized neural networks","author":"Umuroglu","year":"2017","journal-title":"arXiv preprint"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4613-1367-0_10"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1088\/2632-2153\/acc0d7"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-020-01549-8"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.3390\/electronics12051139"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/FPL60245.2023.00014"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3174243.3174253"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICFPT51103.2020.00010"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3543069"},{"key":"ref17","volume-title":"Investopedia","year":"2022"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.23919\/EUSIPCO.2017.8081663"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1002\/for.2543"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2018.2869225"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/cbi.2017.23"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1016\/j.asoc.2020.106401"},{"key":"ref23","volume-title":"ONNX","year":"2018"},{"key":"ref24","author":"Pappalardo","year":"2021","journal-title":"Xilinx\/brevitas"},{"key":"ref25","author":"Brevitas","year":"2024","journal-title":"Quantlstm - brevitas tutorials"},{"key":"ref26","article-title":"Qonnx: Representing arbitrary-precision quantized neural networks","author":"Pappalardo","year":"2022","journal-title":"arXiv preprint"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TETCI.2018.2872598"}],"event":{"name":"2025 35th International Conference on Field-Programmable Logic and Applications (FPL)","location":"Leiden, Netherlands","start":{"date-parts":[[2025,9,1]]},"end":{"date-parts":[[2025,9,5]]}},"container-title":["2025 35th International Conference on Field-Programmable Logic and Applications (FPL)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11449056\/11449057\/11449066.pdf?arnumber=11449066","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,27]],"date-time":"2026-03-27T05:44:21Z","timestamp":1774590261000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11449066\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,9,1]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/fpl68686.2025.00018","relation":{},"subject":[],"published":{"date-parts":[[2025,9,1]]}}}