{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,27]],"date-time":"2026-03-27T06:58:10Z","timestamp":1774594690055,"version":"3.50.1"},"reference-count":53,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,9,1]],"date-time":"2025-09-01T00:00:00Z","timestamp":1756684800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,9,1]],"date-time":"2025-09-01T00:00:00Z","timestamp":1756684800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,9,1]]},"DOI":"10.1109\/fpl68686.2025.00022","type":"proceedings-article","created":{"date-parts":[[2026,3,26]],"date-time":"2026-03-26T19:48:24Z","timestamp":1774554504000},"page":"73-82","source":"Crossref","is-referenced-by-count":0,"title":["From Errors to Solutions: LLM-Powered Command Scripting for FPGA Cad Tools"],"prefix":"10.1109","author":[{"given":"Mohamed A.","family":"Elgammal","sequence":"first","affiliation":[{"name":"University of Toronto,Dept. of Electrical & Computer Engineering,Toronto,Canada"}]},{"given":"Vaughn","family":"Betz","sequence":"additional","affiliation":[{"name":"University of Toronto,Dept. of Electrical & Computer Engineering,Toronto,Canada"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/access.2016.2559781"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2017.8167769"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.022071131"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3373087.3375380"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2019.00035"},{"key":"ref6","volume-title":"Vivado Design Suite User Guide","year":"2025"},{"key":"ref7","volume-title":"Vivado Design Suite User Guide: Implementation (UG904)","year":"2025"},{"key":"ref8","article-title":"Quartus Prime Standard Edition Handbook: Volume 1 - Design and Synthesis","volume-title":"Intel Corporation","year":"2017"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/3388617"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3734798"},{"key":"ref11","volume-title":"Verilog-to-Routing Developers, Verilog-to-Routing Documentation","year":"2025"},{"key":"ref12","article-title":"GPT-4 technical report","year":"2023","journal-title":"OpenAI"},{"key":"ref13","article-title":"The Claude 3 Model Family: Opus, Sonnet, Haiku","year":"2024","journal-title":"Anthropic"},{"key":"ref14","volume-title":"LLaMA 3.1: Large Language Model with Advanced Capabilities","year":"2024"},{"key":"ref15","year":"2024","journal-title":"LLaMA 3.3: Improved Large Language Model with Robust Features"},{"key":"ref16","article-title":"Yosys open synthesis suite","volume-title":"Search in","author":"Wolf","year":"2021"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2010.31"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-14295-6_5"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-63465-7_226"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2170567"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ICFPT51103.2020.00021"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3109863"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ICFPT59805.2023.00022"},{"key":"ref24","author":"Tang","journal-title":"OpenFPGA: Towards automated prototyping for versatile FPGAs"},{"key":"ref25","volume-title":"eFPGA IP - RapidSilicon - rapidsilicon.com","year":"2023"},{"key":"ref26","volume-title":"Rapid Flex - Build the Future with Rapid Flex - rapid-flex.com","year":"2023"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/3431920.3439297"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2013.40"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2020.2998435"},{"key":"ref30","author":"Wu","year":"2016","journal-title":"Google\u2019s neural machine translation system: Bridging the gap between human and machine translation"},{"key":"ref31","author":"Chen","year":"2021","journal-title":"arXiv preprint"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1038\/s41586-023-06291-2"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/2020.findings-emnlp.261"},{"key":"ref34","article-title":"BloombergGPT: A large language model for finance","author":"Wu","year":"2023","journal-title":"arXiv preprint"},{"key":"ref35","author":"Topics","year":"2024","journal-title":"GPT model sizes: A complete breakdown"},{"key":"ref36","article-title":"Meta Llama 3: Advancing open foundation models","year":"2024","journal-title":"M. AI"},{"key":"ref37","article-title":"DeepSeek models and their capabilities","year":"2024","journal-title":"D. AI"},{"key":"ref38","article-title":"LoRA: Low-rank adaptation of large language models","volume-title":"Proceedings of the International Conference on Learning Representations (ICLR)","author":"Hu"},{"key":"ref39","article-title":"Chain-of-thought prompting elicits reasoning in large language models","volume-title":"Proceedings of the Advances in Neural Information Processing Systems (NeurIPS)","author":"Wei"},{"key":"ref40","article-title":"Retrieval-augmented generation for knowledgeintensive NLP tasks","volume-title":"Proceedings of the Advances in Neural Information Processing Systems (NeurIPS)","author":"Lewis"},{"key":"ref41","volume-title":"Probabilistic Information Retrieval and Statistical Language Models","author":"Robertson","year":"2009"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/2020.emnlp-main.550"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.18653\/v1\/D19-1410"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1145\/3380446.3430634"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323812"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/LAD62341.2024.10691721"},{"key":"ref47","article-title":"Chipnemo: Domain-adapted llms for chip design","author":"Liu","year":"2023","journal-title":"arXiv preprint"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2024.3374558"},{"key":"ref49","article-title":"OpenAI API","volume-title":"OpenAI","year":"2024"},{"key":"ref50","article-title":"Groq AI and LPU technology","volume-title":"G. Inc.","year":"2024"},{"key":"ref51","article-title":"Cerebras wafer-scale AI systems","volume-title":"C. Systems","year":"2024"},{"key":"ref52","volume-title":"FAISS: A library for efficient similarity search and clustering of dense vectors","author":"Johnson","year":"2017"},{"key":"ref53","article-title":"GTE: General text embeddings for retrieval and beyond","volume-title":"Hugging Face Model Hub","year":"2023"}],"event":{"name":"2025 35th International Conference on Field-Programmable Logic and Applications (FPL)","location":"Leiden, Netherlands","start":{"date-parts":[[2025,9,1]]},"end":{"date-parts":[[2025,9,5]]}},"container-title":["2025 35th International Conference on Field-Programmable Logic and Applications (FPL)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11449056\/11449057\/11449069.pdf?arnumber=11449069","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,27]],"date-time":"2026-03-27T05:27:19Z","timestamp":1774589239000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11449069\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,9,1]]},"references-count":53,"URL":"https:\/\/doi.org\/10.1109\/fpl68686.2025.00022","relation":{},"subject":[],"published":{"date-parts":[[2025,9,1]]}}}