{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T08:42:12Z","timestamp":1725525732025},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/fpt.2002.1188670","type":"proceedings-article","created":{"date-parts":[[2003,10,1]],"date-time":"2003-10-01T10:56:02Z","timestamp":1065005762000},"page":"102-109","source":"Crossref","is-referenced-by-count":2,"title":["A system level implementation of Rijndael on a memory-slot based FPGA card"],"prefix":"10.1109","author":[{"given":"D.K.Y.","family":"Tong","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Pui Sze Lo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Kin Hong Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"P.H.W.","family":"Leong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/92.931230"},{"key":"ref3","first-page":"65","author":"mcloone","year":"2001","journal-title":"High Performance Single-Chip FPGA Rijndael Algorithm Implementations"},{"journal-title":"SGT","article-title":"Optimizing CPU to Metoory Accesseson the SGI Visual Workstations 320 and 540","year":"0","key":"ref10"},{"journal-title":"The Rijndael Blook Cipher AES Proposal Document version 2","year":"1999","author":"daemen","key":"ref6"},{"key":"ref5","first-page":"77","author":"fischer","year":"2001","journal-title":"Two Methods of Rijndael Implementation in Reconfigurable Hardware"},{"key":"ref8","article-title":"Comparison of the Hardware Perforrmnce of the AES Candidates using Reconfigurable Hardware","author":"gaj","year":"2000","journal-title":"The Third Advanced Encryption Standard Candidate Conference"},{"journal-title":"PilchardA Reconfigurable Computing Platform With Memory Slot Interface","year":"2001","author":"leong","key":"ref7"},{"article-title":"The AES Algorithm (Rijndael) in C and C++","year":"2001","author":"gladman","key":"ref2"},{"key":"ref9","article-title":"A Comparative Study of performance of AES Candidates Using FPGAs","author":"dandalis","year":"2000","journal-title":"The Third Advanced Encryption Standard Candidate Conference"},{"journal-title":"Applied Cryptography","year":"1996","author":"schnier","key":"ref1"}],"event":{"name":"2002 IEEE International Conference on Field-Programmable Technology (FPT)","acronym":"FPT-02","location":"Hong Kong, China"},"container-title":["2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8456\/26638\/01188670.pdf?arnumber=1188670","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T13:49:35Z","timestamp":1489412975000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1188670\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/fpt.2002.1188670","relation":{},"subject":[]}}