{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,8]],"date-time":"2025-04-08T06:42:22Z","timestamp":1744094542212},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/fpt.2002.1188703","type":"proceedings-article","created":{"date-parts":[[2003,10,1]],"date-time":"2003-10-01T10:56:02Z","timestamp":1065005762000},"page":"328-331","source":"Crossref","is-referenced-by-count":12,"title":["Diagnosis of open defects in FPGA interconnect"],"prefix":"10.1109","author":[{"given":"M.B.","family":"Tahoori","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743133"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2000.894292"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1997.639662"},{"key":"ref13","article-title":"Fault Emulation, A Method of FPGA Test","author":"toutounchi","year":"2001","journal-title":"US patent pending"},{"key":"ref14","first-page":"722","article-title":"Test and diagnosis of faulty logic blocks in FPGAs","author":"wang","year":"1997","journal-title":"Proc ICCAD"},{"journal-title":"Xilinx Inc","article-title":"The Programmable Logic Data Book 2001","year":"2001","key":"ref15"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.1998.741625"},{"key":"ref4","article-title":"Column-Based Precompiled Configuration Techniques for FPGA Fault Tolerance","author":"huang","year":"2001","journal-title":"Proc IEEE Symp Field-Programmable Custom Computing Machines 2001"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1999.766697"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/54.655181"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1996.510859"},{"key":"ref8","first-page":"100","article-title":"Diagnosing Programmable Interconnect Systems for FPGAs","author":"lombardi","year":"1996","journal-title":"Proc ACM Int'l Symp FPGAs"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1995.512646"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.1999.745159"},{"key":"ref1","article-title":"BIST-Based Detection and Diagnosis of Multiple Faults in FPGAs","author":"abramovici","year":"2000","journal-title":"Proc Int'l Test Conf"},{"key":"ref9","article-title":"Fault Location in FPGA-Based Reconfigurable Systems","author":"mitra","year":"1998","journal-title":"Proc IEEE Int Workshop High-Level Design Validation and Test"}],"event":{"name":"2002 IEEE International Conference on Field-Programmable Technology (FPT)","acronym":"FPT-02","location":"Hong Kong, China"},"container-title":["2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8456\/26638\/01188703.pdf?arnumber=1188703","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T18:12:35Z","timestamp":1489428755000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1188703\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/fpt.2002.1188703","relation":{},"subject":[]}}