{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T22:56:22Z","timestamp":1729637782111,"version":"3.28.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,12]]},"DOI":"10.1109\/fpt.2013.6718366","type":"proceedings-article","created":{"date-parts":[[2014,1,24]],"date-time":"2014-01-24T16:19:42Z","timestamp":1390580382000},"page":"278-285","source":"Crossref","is-referenced-by-count":5,"title":["StML: Bridging the gap between FPGA design and HDL circuit description"],"prefix":"10.1109","author":[{"given":"Dustin","family":"Peterson","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Oliver","family":"Bringmann","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Thomas","family":"Schweizer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wolfgang","family":"Rosenstiel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2013.45"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2011.69"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1145\/1344671.1344729"},{"journal-title":"JBits A Java-Based Interface for Reconfigurable Computing","year":"0","author":"guccione","key":"11"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/ISSOC.2007.4427437"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2011.5981545"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.2000.887181"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2010.77"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/MC.1983.1654264"},{"key":"7","doi-asserted-by":"crossref","first-page":"1487","DOI":"10.1109\/43.790625","article-title":"Fault emulation: A new methodology for fault grading","volume":"18","author":"cheng","year":"1999","journal-title":"Computer-Aided Design of Integrated Circuits and Systems IEEE Transactions on"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/240518.240669"},{"key":"5","first-page":"14","author":"brand","year":"1994","journal-title":"Incremental Synthesis In Computer-Aided Design"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2012.6339165"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2010.5548694"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2006.270315"}],"event":{"name":"2013 International Conference on Field-Programmable Technology (FPT)","start":{"date-parts":[[2013,12,9]]},"location":"Kyoto, Japan","end":{"date-parts":[[2013,12,11]]}},"container-title":["2013 International Conference on Field-Programmable Technology (FPT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6712172\/6718311\/06718366.pdf?arnumber=6718366","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T02:38:48Z","timestamp":1498099128000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6718366\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,12]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/fpt.2013.6718366","relation":{},"subject":[],"published":{"date-parts":[[2013,12]]}}}