{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T20:36:43Z","timestamp":1725568603325},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,12]]},"DOI":"10.1109\/fpt.2016.7929540","type":"proceedings-article","created":{"date-parts":[[2017,5,18]],"date-time":"2017-05-18T18:35:29Z","timestamp":1495132529000},"page":"229-232","source":"Crossref","is-referenced-by-count":5,"title":["Exploring shared SRAM tables among NPN equivalent large LUTs in SRAM-based FPGAs"],"prefix":"10.1109","author":[{"given":"Ali","family":"Asghar","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Muhammad Mazher","family":"Iqbal","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Waqar","family":"Ahmed","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mujahid","family":"Ali","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Husain","family":"Parvez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Muhammad","family":"Rashid","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/2617593"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2013.6718374"},{"journal-title":"ABC A System for Sequential Synthesis and Verification","year":"0","key":"ref12"},{"journal-title":"Intelligent FPGA Architecture Repository (iFAR)","year":"0","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.824300"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/12.713316"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2010.68"},{"key":"ref6","article-title":"Folding of Logic Functions and its Application to Look Up Table Compaction","author":"kimura","year":"2002","journal-title":"Proceedings of the IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)"},{"key":"ref5","article-title":"Classifying n-input Boolean functions","author":"correia","year":"2001","journal-title":"VII Workshop IBERCHIP"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2014.6927460"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.893581"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2015.7293953"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-5145-4"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2011.5722215"}],"event":{"name":"2016 International Conference on Field-Programmable Technology (FPT)","start":{"date-parts":[[2016,12,7]]},"location":"Xi'an, China","end":{"date-parts":[[2016,12,9]]}},"container-title":["2016 International Conference on Field-Programmable Technology (FPT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7924463\/7929174\/07929540.pdf?arnumber=7929540","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,5,31]],"date-time":"2017-05-31T00:19:48Z","timestamp":1496189988000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7929540\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,12]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/fpt.2016.7929540","relation":{},"subject":[],"published":{"date-parts":[[2016,12]]}}}