{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,18]],"date-time":"2025-05-18T20:40:09Z","timestamp":1747600809296,"version":"3.40.5"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,10]]},"DOI":"10.1109\/gcce.2014.7031240","type":"proceedings-article","created":{"date-parts":[[2015,2,10]],"date-time":"2015-02-10T14:58:51Z","timestamp":1423580331000},"page":"630-631","source":"Crossref","is-referenced-by-count":0,"title":["Thermal-aware kernel mapping for three-dimensional multi-mode channel decoding"],"prefix":"10.1109","author":[{"family":"Shu-Yen Lin","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Cheng-Hung","family":"Lin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Ho-Yun Su","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"crossref","first-page":"92","DOI":"10.1145\/1118299.1118322","article-title":"A high-throughput low-power fully parallel 1024-bit 1\/2-rate low density parity check code decoder in 3D integrated circuits","author":"zhou","year":"2006","journal-title":"Asia and South Pacific Conference on Design Automation"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1962.1057683"},{"key":"10","article-title":"Thermal-aware task mapping for reconfigurable channel decoding","author":"lin","year":"2014","journal-title":"IEEE 2nd International Symposium on Bioelectronics & Bioinformatics"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ICC.1993.397441"},{"key":"7","doi-asserted-by":"crossref","first-page":"2","DOI":"10.1145\/871656.859620","article-title":"Temperature-aware microarchitecture","author":"skadron","year":"2003","journal-title":"Proceedings of the 30th International Symposium on Computer Architecture"},{"key":"6","first-page":"1036","article-title":"Efficient implementation of the sum-product algorithm for decoding LDPC codes","author":"hu","year":"2001","journal-title":"Proc IEEE Globecom"},{"key":"5","doi-asserted-by":"crossref","first-page":"305","DOI":"10.1109\/TVLSI.2009.2032553","article-title":"Area-efficient scalable MAP architecture design for high-throughput multistandard convolutional turbo decoding","volume":"19","author":"lin","year":"2011","journal-title":"IEEE Trans Very Large Scale Integration Systems"},{"key":"4","first-page":"1469","article-title":"Area-efficient radix-4 SISO architecture design for multi-standard turbo\/LDPC decoding","author":"yu","year":"2012","journal-title":"Proc Int Tech Conf Circuits\/Systems Computers and Communications"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.176"},{"key":"8","first-page":"611","article-title":"Analysis and runtime management of 3d systems with stacked dram for boosting energy efficiency","author":"meng","year":"2012","journal-title":"Proc DATE"}],"event":{"name":"2014 IEEE 3rd Global Conference on Consumer Electronics (GCCE)","start":{"date-parts":[[2014,10,7]]},"location":"Tokyo, Japan","end":{"date-parts":[[2014,10,10]]}},"container-title":["2014 IEEE 3rd Global Conference on Consumer Electronics (GCCE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7020225\/7031081\/07031240.pdf?arnumber=7031240","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,18]],"date-time":"2025-05-18T20:11:21Z","timestamp":1747599081000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7031240\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,10]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/gcce.2014.7031240","relation":{},"subject":[],"published":{"date-parts":[[2014,10]]}}}