{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T21:39:19Z","timestamp":1725745159136},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,10,12]],"date-time":"2021-10-12T00:00:00Z","timestamp":1633996800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,10,12]],"date-time":"2021-10-12T00:00:00Z","timestamp":1633996800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,10,12]],"date-time":"2021-10-12T00:00:00Z","timestamp":1633996800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,10,12]]},"DOI":"10.1109\/gcce53005.2021.9622108","type":"proceedings-article","created":{"date-parts":[[2021,12,1]],"date-time":"2021-12-01T16:04:38Z","timestamp":1638374678000},"page":"913-914","source":"Crossref","is-referenced-by-count":1,"title":["Implementation and Evaluation of Block Cipher Algorithm with Content Addressable Memory-Based Massive-Parallel SIMD Matrix Core"],"prefix":"10.1109","author":[{"given":"Sota","family":"Arai","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kyosuke","family":"Kageyama","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xiangbo","family":"Kong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Takesi","family":"Kumaki","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1093\/ietele\/e91-c.9.1409"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696216"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-74735-2_31"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/S1353-4858(10)70006-4"},{"year":"0","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS48704.2020.9184552"},{"key":"ref1","article-title":"Basic operation verification of content addressable memory-based massive-parallel SIMD matrix core for multimedia applications","author":"watanabe","year":"2019","journal-title":"International Symposium of Biomedical Engineering"}],"event":{"name":"2021 IEEE 10th Global Conference on Consumer Electronics (GCCE)","start":{"date-parts":[[2021,10,12]]},"location":"Kyoto, Japan","end":{"date-parts":[[2021,10,15]]}},"container-title":["2021 IEEE 10th Global Conference on Consumer Electronics (GCCE)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9621302\/9621353\/09622108.pdf?arnumber=9622108","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T12:53:48Z","timestamp":1652187228000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9622108\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,10,12]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/gcce53005.2021.9622108","relation":{},"subject":[],"published":{"date-parts":[[2021,10,12]]}}}