{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T06:03:06Z","timestamp":1729663386438,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2003]]},"DOI":"10.1109\/hicss.2003.1174812","type":"proceedings-article","created":{"date-parts":[[2004,6,22]],"date-time":"2004-06-22T16:27:43Z","timestamp":1087921663000},"page":"10 pp.","source":"Crossref","is-referenced-by-count":1,"title":["Towards verifying parametrised hardware libraries with relative placement information [parametrised read parameterised]"],"prefix":"10.1109","author":[{"given":"S.","family":"McKeever","sequence":"first","affiliation":[]},{"given":"W.","family":"Luk","sequence":"additional","affiliation":[]},{"given":"A.","family":"Derbyshire","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-44798-9_19"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2001.957532"},{"key":"ref12","article-title":"Compiling hardware descriptions with relative placement information for parameterised librarires","author":"mckeever","year":"2002","journal-title":"in Proc 4th Int Conf on Formal Methods in Computer-Aided Design LNCS 2517 Springer"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008603713967"},{"key":"ref14","doi-asserted-by":"crossref","DOI":"10.1049\/ip-cdt:20000486","article-title":"Framework and tools for runtime reconfigurable designs","volume":"147","author":"shirazi","year":"2000","journal-title":"IEE Proc Comput Digit Tech"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1995.477420"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.2000.903401"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1995.477422"},{"journal-title":"Partial Evaluation and Automatic Program Generation Prentice Hall International Series in Computer Science","year":"1993","author":"jones","key":"ref3"},{"key":"ref6","article-title":"Parameterised Hardware Libraries for Programmable System-On-Chip Technology","volume":"26","author":"luk","year":"2001","journal-title":"Canadian Journal of Electrical and Computer Engineering"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-61730-2_3"},{"key":"ref8","article-title":"Pebble: a language for parametrised and reconfigurable hardware design","author":"luk","year":"1998","journal-title":"Field-Programmable Logic and Applications LNCS 1482 Springer"},{"article-title":"Parametrising designs for FPGAs","year":"1991","author":"luk","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/S1383-7621(00)00052-7"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/289423.289440"},{"key":"ref9","article-title":"Dynamically reconfigurable cores","author":"macbeth","year":"2001","journal-title":"Field-Programmable Logic and Applications LNCS 2147 Springer"}],"event":{"name":"36th Annual Hawaii International Conference on System Sciences, 2003. Proceedings of the","start":{"date-parts":[[2003,1,9]]},"location":"Big Island, HI, USA","end":{"date-parts":[[2003,1,9]]}},"container-title":["36th Annual Hawaii International Conference on System Sciences, 2003. Proceedings of the"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8360\/26341\/01174812.pdf?arnumber=1174812","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,16]],"date-time":"2017-06-16T04:15:19Z","timestamp":1497586519000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1174812\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/hicss.2003.1174812","relation":{},"subject":[],"published":{"date-parts":[[2003]]}}}