{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T19:52:14Z","timestamp":1729626734004,"version":"3.28.0"},"reference-count":22,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,12]]},"DOI":"10.1109\/hipc.2010.5713183","type":"proceedings-article","created":{"date-parts":[[2011,2,16]],"date-time":"2011-02-16T00:26:36Z","timestamp":1297815996000},"page":"1-10","source":"Crossref","is-referenced-by-count":4,"title":["A log-based redundant architecture for reliable parallel computation"],"prefix":"10.1109","author":[{"given":"Daniel","family":"Sanchez","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Juan L.","family":"Aragon","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jose M.","family":"Garcia","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","article-title":"Detailed design and evaluation of redundant multithreading alternatives","author":"mukherjee","year":"2002","journal-title":"Proc of the 29th Int’ Symp on Comp Arch"},{"key":"ref11","article-title":"Revive: Cost-effective architectural support for rollback recovery in shared-memory multiprocessors","author":"prvulovic","year":"2002","journal-title":"Proc of the 29th Int’ Symp on Comp Arch"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658655"},{"key":"ref13","first-page":"25","article-title":"Transient fault detection via simultaneous multithreading","author":"reinhardt","year":"2000","journal-title":"Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat No RS00201) ISCA"},{"journal-title":"Selse ii reverie","year":"2006","author":"remarks","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.42"},{"key":"ref16","article-title":"Safetynet: Improving the availability of shared memory multiprocessors with global checkpoint\/recovery","author":"sorin","year":"2002","journal-title":"Proc of the 29th Int’ Symp on Comp Arch"},{"key":"ref17","article-title":"Evaluating dynamic core coupling in a scalable tiled-cmp architecture","author":"s\u00e1nchez","year":"2008","journal-title":"Proc 7th Workshop on Duplicating Deconstructing and Debunking"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-03869-3_32"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003565"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859631"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250697"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1346281.1346315"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2007.100"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/2.982916"},{"key":"ref7","first-page":"34","article-title":"The alpbench benchmark suite for complex multimedia applications","author":"li","year":"2005","journal-title":"Proc of the IEEE Int Symp on Workload Characterization"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-7091-8871-2_3"},{"key":"ref9","doi-asserted-by":"crossref","DOI":"10.1145\/1105734.1105747","article-title":"Multifacet's general execution-driven multiprocessor simulator (gems) toolset","volume":"33","author":"martin","year":"2005","journal-title":"SIGARCH Comput Archit News"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2006.40"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346204"},{"key":"ref21","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1109\/ISCA.1995.524546","article-title":"The SPLASH-2 programs: characterization and methodological considerations","author":"woo","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"}],"event":{"name":"2010 International Conference on High Performance Computing (HiPC)","start":{"date-parts":[[2010,12,19]]},"location":"Goa, India","end":{"date-parts":[[2010,12,22]]}},"container-title":["2010 International Conference on High Performance Computing"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5708271\/5713158\/05713183.pdf?arnumber=5713183","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,4,4]],"date-time":"2024-04-04T05:11:16Z","timestamp":1712207476000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5713183\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,12]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/hipc.2010.5713183","relation":{},"subject":[],"published":{"date-parts":[[2010,12]]}}}