{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,4]],"date-time":"2025-09-04T13:44:43Z","timestamp":1756993483785,"version":"3.28.0"},"reference-count":24,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,12]]},"DOI":"10.1109\/hipc.2014.7116904","type":"proceedings-article","created":{"date-parts":[[2015,6,10]],"date-time":"2015-06-10T19:32:46Z","timestamp":1433964766000},"page":"1-10","source":"Crossref","is-referenced-by-count":20,"title":["CQA: A code quality analyzer tool at binary level"],"prefix":"10.1109","author":[{"given":"Andres S.","family":"Charif-Rubial","sequence":"first","affiliation":[]},{"given":"Emmanuel","family":"Oseret","sequence":"additional","affiliation":[]},{"given":"Jose","family":"Noudohouenou","sequence":"additional","affiliation":[]},{"given":"William","family":"Jalby","sequence":"additional","affiliation":[]},{"given":"Ghislain","family":"Lartigue","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"year":"0","key":"ref10","article-title":"instlatx64.atw.hu. x86, x64 instruction latency, memory latency and cpuid dumps"},{"year":"0","key":"ref11","article-title":"Architecture code analyzer"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/HPCSim.2013.6641465"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-68564-7_9"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/2464996.2465440"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1016\/j.jcp.2012.11.046"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1016\/j.crme.2010.12.001"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1016\/j.combustflame.2010.12.004"},{"key":"ref18","article-title":"Paraver: A tool to visualize and analyze parallel code","author":"pillet","year":"1995","journal-title":"Technical Report WoTUG-18"},{"key":"ref19","first-page":"118","article-title":"Qmc=chem: A quantum monte carlo program for large-scale simulations in chemistry at the petascale level and beyond","author":"scemama","year":"2012","journal-title":"VECPAR"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2010.41"},{"key":"ref3","first-page":"1","article-title":"Periscope: An online-based distributed performance analysis tool","author":"benedict","year":"2009","journal-title":"Parallel Tools Workshop"},{"article-title":"Intel&#x00AE;Advisor XE 2013","year":"2013","author":"corporation","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HiPC.2013.6799106"},{"article-title":"Vector seeker: a tool for finding vector potential","year":"2013","author":"evans","key":"ref8"},{"article-title":"Intel&#x00AE;VTune&#x2122;Amplifier XE 2013","year":"2013","author":"corporation","key":"ref7"},{"article-title":"Detecting SIMDization Opportunities through Static\/Dynamic Dependence Analysis","year":"2013","author":"aumage","key":"ref2"},{"article-title":"Hpctoolkit: Tools for performance analysis of optimized parallel programs","year":"2008","author":"adhianto","key":"ref1"},{"article-title":"Instruction tables: Lists of instruction latencies, throughputs and micro-operation breakdowns for intel, amd and via cpus","year":"0","author":"fog","key":"ref9"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1002\/jcc.23216"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1177\/1094342006064482"},{"key":"ref21","first-page":"105","article-title":"Openspeedshop: An open source infrastructure for parallel performance analysis","volume":"16","author":"schulz","year":"2008","journal-title":"Sci Program"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2484762.2484777"},{"journal-title":"Maqao tool","year":"0","author":"team","key":"ref23"}],"event":{"name":"2014 21st International Conference on High-Performance Computing (HiPC)","start":{"date-parts":[[2014,12,17]]},"location":"Dona Paula","end":{"date-parts":[[2014,12,20]]}},"container-title":["2014 21st International Conference on High Performance Computing (HiPC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7113430\/7116705\/07116904.pdf?arnumber=7116904","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,2,5]],"date-time":"2020-02-05T22:56:48Z","timestamp":1580943408000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7116904\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,12]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/hipc.2014.7116904","relation":{},"subject":[],"published":{"date-parts":[[2014,12]]}}}