{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,29]],"date-time":"2024-10-29T18:03:00Z","timestamp":1730224980227,"version":"3.28.0"},"reference-count":9,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/hldvt.2002.1224433","type":"proceedings-article","created":{"date-parts":[[2003,10,1]],"date-time":"2003-10-01T10:56:02Z","timestamp":1065005762000},"page":"83-88","source":"Crossref","is-referenced-by-count":2,"title":["Adaptive test program generation: planning for the unplanned"],"prefix":"10.1109","author":[{"given":"A.","family":"Adir","sequence":"first","affiliation":[]},{"given":"R.","family":"Emek","sequence":"additional","affiliation":[]},{"given":"E.","family":"Marcus","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1147\/sj.413.0386"},{"key":"ref3","article-title":"Design verification of the HP 9000 series 700 PA-RISC workstations","volume":"14","author":"ahi","year":"1992","journal-title":"Hewlett-Packard Journal"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/DATE.1999.761162"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/ICCD.1992.276260"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/DAC.1996.545591"},{"key":"ref7","first-page":"574","article-title":"A methodology for the verification of a “system on a chip","author":"geist","year":"1999","journal-title":"The 36th Design Automation Conference"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/DAC.1995.249960"},{"key":"ref9","first-page":"638","article-title":"Functional verification of a multiple-issue, out-of-order, superscalar alpha processor - the DEC Alpha 21264 microprocessor","author":"taylor","year":"1998","journal-title":"Proc 35th Design Automation Conference"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/HLDVT.2001.972809"}],"event":{"acronym":"HLDVT-02","name":"IEEE International High Level Design Validation and Test Workshop (HLDVT'02)","location":"Cannes, France"},"container-title":["Seventh IEEE International High-Level Design Validation and Test Workshop, 2002."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8669\/27468\/01224433.pdf?arnumber=1224433","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T14:30:30Z","timestamp":1489415430000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1224433\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/hldvt.2002.1224433","relation":{},"subject":[]}}