{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T16:59:05Z","timestamp":1725382745736},"reference-count":20,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/hldvt.2005.1568825","type":"proceedings-article","created":{"date-parts":[[2006,1,18]],"date-time":"2006-01-18T23:42:54Z","timestamp":1137627774000},"page":"121-126","source":"Crossref","is-referenced-by-count":0,"title":["A new simulation-based property checking algorithm based on partitioned alternative search space traversal"],"prefix":"10.1109","author":[{"family":"Qingwei Wu","sequence":"first","affiliation":[]},{"given":"M.S.","family":"Hsiao","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/EDAC.1991.206393"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2004.1387345"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1997.600290"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1271112"},{"key":"16","first-page":"389","article-title":"Efficient ATPG for Design Validation Based On Partitioned State Exploration Histories","author":"wu","year":"2004","journal-title":"Proc VLSI Test Symp"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/12.769433"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2001.156196"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2002.1012734"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1999.781333"},{"year":"0","key":"3","article-title":"Mur\ufffd Description Language and Verifier"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/EDTC.1997.582325"},{"year":"0","key":"2"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1997.628907"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2001.972805"},{"key":"7","first-page":"418","article-title":"Model Checking Based on Sequential ATPG","author":"boppana","year":"1999","journal-title":"Proc CAS"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-3190-6"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1997.643567"},{"year":"0","key":"4","article-title":"The SMV System"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041761"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2001.972826"}],"event":{"name":"Tenth IEEE International High-Level Design Validation and Test Workshop, 2005.","location":"Napa Valley, CA, USA"},"container-title":["Tenth IEEE International High-Level Design Validation and Test Workshop, 2005."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/10490\/33246\/01568825.pdf?arnumber=1568825","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,14]],"date-time":"2017-03-14T17:54:09Z","timestamp":1489514049000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1568825\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":20,"URL":"https:\/\/doi.org\/10.1109\/hldvt.2005.1568825","relation":{},"subject":[]}}