{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T18:47:28Z","timestamp":1729622848884,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2008,11]]},"DOI":"10.1109\/hldvt.2008.4695883","type":"proceedings-article","created":{"date-parts":[[2008,12,10]],"date-time":"2008-12-10T11:43:50Z","timestamp":1228909430000},"page":"93-100","source":"Crossref","is-referenced-by-count":0,"title":["IBM system z functional and performance verification using X-Gen"],"prefix":"10.1109","author":[{"given":"Torsten","family":"Schober","sequence":"first","affiliation":[]},{"given":"Bodo","family":"Hoppe","sequence":"additional","affiliation":[]},{"given":"Shimon","family":"Landa","sequence":"additional","affiliation":[]},{"given":"Ronny","family":"Morad","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"15","DOI":"10.1147\/sj.413.0386"},{"doi-asserted-by":"publisher","key":"16","DOI":"10.1016\/0004-3702(77)90007-8"},{"year":"2001","author":"haque","journal-title":"The Art of Verification with Vera","key":"13"},{"doi-asserted-by":"publisher","key":"14","DOI":"10.1109\/HLDVT.2002.1224432"},{"key":"11","first-page":"338","article-title":"verification of the cell broadband enginetm processor","author":"shimizu","year":"2006","journal-title":"43rd Design Automation Conference"},{"year":"0","journal-title":"Spec-based Verification","key":"12"},{"key":"3","article-title":"s390 parallel sysplex cluster","volume":"36","year":"1997","journal-title":"IBM Systems Journal"},{"key":"2","doi-asserted-by":"crossref","DOI":"10.1147\/JRD.2009.5388573","article-title":"z10 i\/o subsystem overview","author":"chencinski","year":"2009","journal-title":"IBM J Res & Dev"},{"doi-asserted-by":"publisher","key":"1","DOI":"10.1147\/rd.461.0005"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1109\/HLDVT.2002.1224444"},{"key":"7","doi-asserted-by":"crossref","DOI":"10.1147\/JRD.2009.5388584","article-title":"design and verification of the z10 io-infrastructure chips","author":"schlipf","year":"2009","journal-title":"IBM J Res & Dev"},{"year":"2002","author":"shanley","journal-title":"InfiniBand Network Architecture","key":"6"},{"year":"0","journal-title":"InfiniBand Architecture Specification Vol 2 Rel 1 2","key":"5"},{"year":"0","journal-title":"InfiniBand Architecture Specification Vol 1 Rel 1 2 1","key":"4"},{"year":"2005","author":"wile","journal-title":"Comprehensive Functional Verification The Complete Industry Cycle (Systems on Silicon)","key":"9"},{"doi-asserted-by":"publisher","key":"8","DOI":"10.1147\/rd.435.0829"}],"event":{"name":"2008 IEEE International High Level Design Validation and Test Workshop (HLDVT)","start":{"date-parts":[[2008,11,19]]},"location":"Incline Village, NV, USA","end":{"date-parts":[[2008,11,21]]}},"container-title":["2008 IEEE International High Level Design Validation and Test Workshop"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4690895\/4695856\/04695883.pdf?arnumber=4695883","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T10:37:23Z","timestamp":1497782243000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4695883\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,11]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/hldvt.2008.4695883","relation":{},"subject":[],"published":{"date-parts":[[2008,11]]}}}