{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,21]],"date-time":"2026-02-21T18:38:30Z","timestamp":1771699110938,"version":"3.50.1"},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,11]]},"DOI":"10.1109\/hldvt.2012.6418238","type":"proceedings-article","created":{"date-parts":[[2013,1,30]],"date-time":"2013-01-30T17:50:54Z","timestamp":1359568254000},"page":"17-24","source":"Crossref","is-referenced-by-count":3,"title":["Using decision diagrams to compactly represent the state space for explicit model checking"],"prefix":"10.1109","author":[{"given":"Hao","family":"Zheng","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andrew","family":"Price","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chris","family":"Myers","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1990.129849"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1145\/1795194.1795197"},{"key":"18","author":"somenzi","year":"0","journal-title":"CUDD CU Decision Diagram Package"},{"key":"15","author":"myers","year":"1995","journal-title":"Computer-aided synthesis and verification of gate-level timed circuits"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-73370-6_17"},{"key":"13","doi-asserted-by":"crossref","DOI":"10.21236\/ADA442970","author":"martin","year":"1986","journal-title":"Self-timed FIFO An exercise in compiling programs into VLSI circuits"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/5.24143"},{"key":"11","author":"holzmann","year":"2003","journal-title":"The SPIN Model Checker Primer and Reference Manual"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/32.588521"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.1996.494447"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1145\/136035.136043"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.1999.761535"},{"key":"2","article-title":"Pathfinder c a second generation of a java model-checker","author":"brat","year":"0","journal-title":"Workshop on Advances in Verification 2000"},{"key":"1","author":"ahrens","year":"2007","journal-title":"A Compositional Approach to Asynchronous Design Verification with Automated State Space Reduction"},{"key":"10","author":"godefroid","year":"1995","journal-title":"Partial-Order Methods for the Verification of Concurrent Systems An Approach to the State-Explosion Problem"},{"key":"7","author":"dill","year":"1988","journal-title":"Trace theory for automatic hierarchical verification of speed independent circuits"},{"key":"6","first-page":"328","article-title":"Saturation: An efficient iteration strategy for symbolic state space generation","volume":"2031","author":"ciardo","year":"2001","journal-title":"LNCS"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/MEMCOD.2004.1459815"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/43.275352"},{"key":"9","article-title":"An improvement in formal verification","author":"holzmann","year":"0","journal-title":"Roc Seventh FORTE Conf Formal Description Techniques 1994"},{"key":"8","author":"clarke","year":"2000","journal-title":"Model checking"}],"event":{"name":"2012 IEEE International High Level Design Validation and Test Workshop (HLDVT)","location":"Huntington Beach, CA, USA","start":{"date-parts":[[2012,11,9]]},"end":{"date-parts":[[2012,11,10]]}},"container-title":["2012 IEEE International High Level Design Validation and Test Workshop (HLDVT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6412847\/6418230\/06418238.pdf?arnumber=6418238","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,8]],"date-time":"2019-07-08T22:11:35Z","timestamp":1562623895000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6418238\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,11]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/hldvt.2012.6418238","relation":{},"subject":[],"published":{"date-parts":[[2012,11]]}}}